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    V2G00 Search Results

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    Part ECAD Model Manufacturer Description Download Buy
    74LV2G00AUSE-E Renesas Electronics Corporation Uni-Logic 74LV-A LVT-A 1G/1GW/2G Series Visit Renesas Electronics Corporation
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    V2G00 Price and Stock

    STMicroelectronics 74V2G00STR

    IC GATE NAND 2CH 2-INP SOT23-8
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    Renesas Electronics Corporation 74LV2G00AUSE-E

    HD74LV2G00A - Uni-Logic 74LV-A LVT-A 1G/1GW/2G Series
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    Rochester Electronics 74LV2G00AUSE-E 3,000 1
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    Renesas Electronics Corporation LV2G00AUSE-E-P

    HD74LV2G00AUSE - Dual 2 input NAND Gates '
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    Rochester Electronics LV2G00AUSE-E-P 66,000 1
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    V2G00 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Marking code V7

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00 Marking code V7

    74LVC2G00

    Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 08 — 26 October 2009 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT

    74V2G00

    Abstract: No abstract text available
    Text: V2G00 DUAL 2-INPUT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74V2G00 OT23-8L OT323-8L OT23-8L OT323-8L 74V2G00STR 74V2G00CTR V2G00 74V2G00

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 12 — 8 April 2013 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00

    74V2G00

    Abstract: 74V2G00STR
    Text: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G00 V2G00 OT23-8L OT323-8L 74V2G00STR 74V2G00 74V2G00STR

    74V2G00

    Abstract: V2G00 74V2G00CTR 74V2G00STR
    Text: V2G00 DUAL 2-INPUT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74V2G00 V2G00 OT23-pecifications 74V2G00 74V2G00CTR 74V2G00STR

    74V2G00STR

    Abstract: 74V2G00 "NAND Gate"
    Text: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G00 V2G00 OT23-8L 74V2G00STR 74V2G00STR 74V2G00 "NAND Gate"

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 10 — 30 November 2011 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00

    74LVC2G00

    Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT sot1089 V2G00
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 09 — 8 June 2010 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT sot1089 V2G00

    74V2G00

    Abstract: 74V2G00STR V2G00
    Text: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74V2G00 V2G00 OT23-8L 74V2G00STR 74V2G00 74V2G00STR

    74V2G00

    Abstract: No abstract text available
    Text: V2G00 DUAL 2-INPUT NAND GATE • ■ ■ HIGH SPEED: tPD = 3.7ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)


    Original     		PDF 74V2G00 V2G00 74V2G00