Untitled
Abstract: No abstract text available
Text: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support
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DS90CR486
SNLS149C
DS90CR486
133MHz
48-Bit
66MHz
133MHz
100-pin
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AN-1059
Abstract: AN-1163 DS90C387 DS90CF384A DS90CF386 DS90CF388
Text: DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description Features The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL
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DS90C387/DS90CF388
DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
AN-1059
AN-1163
DS90C387
DS90CF384A
DS90CF386
DS90CF388
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •
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DS90CR483A,
DS90CR484A
SNLS291A
DS90CR483A
DS90CR484A
48-Bit
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR481, DS90CR482 www.ti.com SNLS137D – NOVEMBER 2000 – REVISED APRIL 2013 DS90CR481 / DS90CR482 48-Bit LVDS Channel Link SER/DES − 65 - 112 MHz Check for Samples: DS90CR481, DS90CR482 FEATURES 1 • • • • 2 • • • • • • • • 3.168 Gbits/sec Bandwidth with 66 MHz Clock
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DS90CR481,
DS90CR482
SNLS137D
DS90CR481
DS90CR482
48-Bit
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PDF
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DS90C387R
Abstract: No abstract text available
Text: November 2000 DS90C387R 85MHz Dual 12-Bit Double Pumped Input LDI Transmitter - VGA/UXGA General Description The DS90C387R transmitter is designed to support pixel data transmission from a Host to a Flat Panel Display up to UXGA resolution. It is designed to be compatible with Graphics Memory Controller Hub GMCH by implementing two
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DS90C387R
85MHz
12-Bit
DS90C387R
12-bit(
24-bit
48-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: September 1999 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL
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Original
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DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483/DS90CR484
48-Bit
DS90CR483
DS90CR484
112MHz,
672Mbps
112MHz
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PDF
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dual pixel lvds
Abstract: CMOS QXGA
Text: DS90C387A,DS90CF388A DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link Literature Number: SNLS065D DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between
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DS90C387A
DS90CF388A
DS90C387A/DS90CF388A
SNLS065D
24-bit
112MHz,
784Mbps,
dual pixel lvds
CMOS QXGA
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PDF
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buffer 24V
Abstract: scanner block diagram flatbed scanner controller canon line scan sensor application notes 300DPI cmos image sensor canon bipolar stepper motor circuits high current canon CIS 300dpi
Text: LM9830 LM9830 36-Bit Color Document Scanner Literature Number: SNOS444B N LM9830 36-Bit Color Document Scanner General Description scan resolution and pixel depth for maximum scan speed. • Stepper motor control tightly coupled with buffer management to maximize data transfer efficiency.
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LM9830
LM9830
36-Bit
SNOS444B
buffer 24V
scanner block diagram
flatbed scanner controller
canon line scan sensor application notes
300DPI
cmos image sensor canon
bipolar stepper motor circuits high current
canon CIS 300dpi
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PDF
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f4ha
Abstract: MX08 LM4560 ymf262 opl3 SNAS029
Text: LM4560 LM4560 Advanced PCI Audio Accelerator Literature Number: SNAS029 LM4560 Advanced PCI Audio Accelerator General Description LM4560 is an advanced PCI audio accelerator providing full legacy compatibility, wavetable synthesis, DirectMusic, DirectSound, and DirectSound3D on a single chip for the highperformance, cost-sensitive consumer market. It supports
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LM4560
LM4560
SNAS029
64-voice
f4ha
MX08
ymf262
opl3
SNAS029
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PDF
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DS90CR482
Abstract: DS90CR483 DS90CR484 DS90CR485 DS90CR486 PRBS-15 termination sense
Text: DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams
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DS90CR485
133MHz
48-bit
DS90CR485
DS90CR482
DS90CR483
DS90CR484
DS90CR486
PRBS-15
termination sense
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 • • • 2 • • • • • • • • •
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DS90CR483A,
DS90CR484A
SNLS291A
DS90CR483A
DS90CR484A
48-Bit
ANSI/TIA/EIA-644-1995
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PDF
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lvds 40 pin pinout
Abstract: 100L DS90CR483 DS90CR483VJD DS90CR484 DS90CR484VJD VJD100A
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483
DS90CR484
48-Bit
DS90CR484
112MHz,
672Mbps
112MHz
38Gbit/s
672Mbytes/s)
lvds 40 pin pinout
100L
DS90CR483VJD
DS90CR484VJD
VJD100A
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PDF
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Untitled
Abstract: No abstract text available
Text: DS90CR481, DS90CR482 www.ti.com SNLS137C – MAY 2004 – REVISED JANUARY 2006 48-Bit LVDS Channel Link SER/DES − 65 - 112 MHz Check for Samples: DS90CR481, DS90CR482 FEATURES 1 • • • • 2 • • 3.168 Gbits/sec bandwidth with 66 MHz Clock 5.376 Gbits/sec bandwidth with 112 MHz Clock
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DS90CR481,
DS90CR482
SNLS137C
48-Bit
ANSI/TIA/EIA-644-1995
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PDF
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FLM G12
Abstract: AN-1059 DS90C387 DS90CF388 "DUAL pixel" Programmable LVDS Receiver 24-Bit RGB
Text: July 2000 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDI -SVGA/QXGA General Description The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL
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DS90C387/DS90CF388
DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
FLM G12
AN-1059
DS90C387
DS90CF388
"DUAL pixel"
Programmable LVDS Receiver 24-Bit RGB
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PDF
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Untitled
Abstract: No abstract text available
Text: FPD85308 FPD85308 Panel Timing Controller Literature Number: SNOS531 May 2001 FPD85308 Panel Timing Controller General Description Features The FPD85308 Panel Timing Controller is an integrated FPD-Link based TFT-LCD timing controller. It resides on the flat panel display and provides the interface signal routing
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FPD85308
FPD85308
SNOS531
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PDF
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SmD TRANSISTOR a42
Abstract: TRANSISTOR BC 136 TRANSISTOR BC 157 transistor BC 945 TRANSISTOR BC 187 SNA10A TRANSISTOR BC 413 MO-220-WGGD-2 pdf on BC 187 TRANSISTOR MO-220-WKKD-2
Text: Plastic Package Dimensional/Thermal Data The following table identifies all of the plastic package configurations and pin counts per package type offered by National Semiconductor. In addition, the table provides dimensional and thermal data for each of the plastic packages
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Untitled
Abstract: No abstract text available
Text: DS90CR485 www.ti.com SNLS143D – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps Check for Samples: DS90CR485 FEATURES DESCRIPTION • • • • • • • • • • • The DS90CR485 serializes the 24 LVCMOS/LVTTL
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DS90CR485
SNLS143D
DS90CR485
133MHz
48-bit
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PDF
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HSYNC, VSYNC, DE
Abstract: AN-1059 DS90C387 DS90C387A DS90CF384A DS90CF388 DS90CF388A 101-32016 101-32013 CMOS QXGA
Text: DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits Dual Pixel 24-bit color of
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DS90C387A/DS90CF388A
DS90C387A/DS90CF388A
24-bit
112MHz,
784Mbps,
CSP-9-111S2.
HSYNC, VSYNC, DE
AN-1059
DS90C387
DS90C387A
DS90CF384A
DS90CF388
DS90CF388A
101-32016
101-32013
CMOS QXGA
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PDF
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SCANSTA112
Abstract: A001 SCANPSC110 SCANSTA111 STA112 PSC110
Text: SCANSTA112 7-port Multidrop IEEE 1149.1 JTAG Multiplexer General Description The SCANSTA112 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board
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SCANSTA112
SCANSTA112
IEEE1149
A001
SCANPSC110
SCANSTA111
STA112
PSC110
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PDF
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DS90CR483VJD
Abstract: No abstract text available
Text: DS90CR483,DS90CR484 DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz Literature Number: SNLS047G DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL
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DS90CR483
DS90CR484
DS90CR484
48-Bit
SNLS047G
DS90CR483/DS90CR484
DS90CR483VJD
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PDF
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LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD
Abstract: No abstract text available
Text: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in
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DS90CR483/DS90CR484
48-Bit
DS90CR483
DS90CR484
112MHz,
672Mbps
112MHz
LVDS 8BIT Tx. 2002 DIGITAL VIEW LTD
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PDF
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LM4560
Abstract: No abstract text available
Text: Semiconductor LM4560 Advanced PCI Audio Accelerator General Description The LM4560 integrates a 64-voice wave table engine with per voice effect processing capability. It supports the upcom ing Microsoft DirectMusic API and is fully compatible with DLS Level 1 downloadable samples specification. The
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OCR Scan
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LM4560
64-voice
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PDF
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FLM G12
Abstract: EL B17
Text: Semiconductor PRELIMINARY April 1999 DS90C387/DS90CF388 Dual Pixel LVDS Display Interface LDQ-SVGA/QXGA General Description The DS90C387/DS90CF388 transmitter/receiver pair is de signed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The trans
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OCR Scan
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DS90C387/DS90CF388
24-bit
112MHz,
672Mbps,
38Gbps
FLM G12
EL B17
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PDF
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