02APR
Abstract: No abstract text available
Text: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:
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M48Z35
M48Z35Y
M48Z35:
M48Z35Y:
28-lead
02APR
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M48Z35
Abstract: M48Z35Y SOH28 PCDIP28
Text: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultralow power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ 28 1 WRITE protect voltages:
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Original
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M48Z35
M48Z35Y
M48Z35:
M48Z35Y:
28-lead
M48Z35
M48Z35Y
SOH28
PCDIP28
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PDF
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Numonyx M25P128
Abstract: M25P128 so16 M25P128 VDFPN8
Text: M25P128 128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface Features 128-Mbit flash memory 2.7 to 3.6 V single supply voltage SPI bus compatible serial interface 54 MHz clock rate maximum for 65 nm devices VDFPN8 (ME) 8 x 6 mm (MLP8)
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M25P128
128-Mbit,
54-MHz
128-Mbit
2018h)
20-year
Numonyx M25P128
M25P128 so16
M25P128 VDFPN8
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PDF
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SOH28
Abstract: M48Z35AV
Text: M48Z35AV 5.0V or 3.3V, 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Battery low flag (BOK) ■ Automatic power-fail chip deselect and WRITE
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Original
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M48Z35AV
256Kbit
32Kbit
28-lead
PCDIP28
M48Z35AV:
SOH28
M48Z35AV
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PDF
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JESD97
Abstract: STL20NM20N
Text: STL20NM20N N-CHANNEL 200V - 0.088Ω - 20A PowerFLAT ULTRA LOW GATE CHARGE MDmesh™ II MOSFET Table 1: General Features TYPE STL20NM20N • ■ ■ ■ ■ ■ ■ ■ Figure 1: Package VDSS RDS on ID 200 V < 0.105 Ω 20 A WORLDWIDE LOWEST GATE CHARGE
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STL20NM20N
JESD97
STL20NM20N
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PDF
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STANDARD DIN 6784
Abstract: No abstract text available
Text: M48Z35AV 5.0 V or 3.3 V, 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Battery low flag (BOK) ■
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Original
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M48Z35AV
M48Z35AV:
28-lead
STANDARD DIN 6784
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PDF
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STGP7NC60HD
Abstract: No abstract text available
Text: STGB7NC60HD, STGF7NC60HD, STGP7NC60HD N-channel 14 A, 600 V, very fast IGBT with Ultrafast diode Datasheet − production data Features TAB • Low on-voltage drop VCE(sat ■ Off losses include tail current ■ Losses include diode recovery energy ■
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STGB7NC60HD,
STGF7NC60HD,
STGP7NC60HD
O-263)
O-262)
O-220
O-220FP
STGP7NC60HD
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PDF
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STMicroelectronics Date Code DPAK
Abstract: No abstract text available
Text: STGP7NC60H - STGD7NC60H N-CHANNEL 14A - 600V TO-220/DPAK Very Fast PowerMESH IGBT Figure 1: Package Table 1: General Features TYPE VCES VCE sat (Max) @25°C IC @100°C STGP7NC60H STGD7NC60HT4 600 V 600 V < 2.5 V < 2.5 V 14 A 14 A • ■ ■ ■ ■ LOWER ON-VOLTAGE DROP (Vcesat)
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STGP7NC60H
STGD7NC60H
O-220/DPAK
STGP7NC60H
STGD7NC60HT4
STMicroelectronics Date Code DPAK
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PDF
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Untitled
Abstract: No abstract text available
Text: STL20NM20N N-CHANNEL 200V - 0.088Ω - 20A PowerFLAT ULTRA LOW GATE CHARGE MDmesh™ II MOSFET Table 1: General Features TYPE STL20NM20N • ■ ■ ■ ■ ■ ■ ■ Figure 1: Package VDSS RDS on ID 200 V < 0.105 Ω 20 A WORLDWIDE LOWEST GATE CHARGE
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STL20NM20N
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PDF
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JESD97
Abstract: STL20NM20N
Text: STL20NM20N N-CHANNEL 200V - 0.088Ω - 20A PowerFLAT ULTRA LOW GATE CHARGE MDmesh™ II MOSFET Table 1: General Features TYPE STL20NM20N • ■ ■ ■ ■ ■ ■ ■ Figure 1: Package VDSS RDS on ID 200 V < 0.105 Ω 20 A WORLDWIDE LOWEST GATE CHARGE
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STL20NM20N
JESD97
STL20NM20N
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PDF
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k 2608
Abstract: M48Z35 M48Z35Y SOH28
Text: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:
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Original
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M48Z35
M48Z35Y
M48Z35:
M48Z35Y:
PCDIP28
28-lead
k 2608
M48Z35
M48Z35Y
SOH28
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PDF
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P40N20
Abstract: STB40N20 STF40N20 STP40N20 STP40N20FP STW40N20
Text: STP40N20 - STF40N20 STB40N20 - STW40N20 N-channel 200V - 0.038Ω -40A- D2PAK/TO-220/TO-220FP/TO-247 Low gate charge STripFET Power MOSFET General features Type VDSS RDS on ID PW STB40N20 200V <0.045Ω 40A 160W STP40N20 200V <0.045Ω 40A 160W STP40N20FP
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STP40N20
STF40N20
STB40N20
STW40N20
D2PAK/TO-220/TO-220FP/TO-247
STB40N20
STP40N20
STP40N20FP
O-220
P40N20
STF40N20
STP40N20FP
STW40N20
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PDF
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M48Z58
Abstract: M48Z58Y SOH28
Text: M48Z58 M48Z58Y 5V, 64Kbit 8Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ 28 1
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M48Z58
M48Z58Y
64Kbit
M48Z58:
M48Z58Y:
28-lead
M48Z58
M48Z58Y
SOH28
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PDF
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D22NM20
Abstract: STD22NM20N STD22NM20NT4 D22NM20N D22NM
Text: STD22NM20N N-CHANNEL 200V - 0.088Ω - 22A DPAK ULTRA LOW GATE CHARGE MDmesh II MOSFET Table 1: General Features TYPE STD22NM20N • ■ ■ ■ ■ Figure 1: Package VDSS RDS on ID 200 V < 0.105 Ω 22 A WORLDWIDE LOWEST GATE CHARGE TYPICAL RDS(on) = 0.088 Ω
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STD22NM20N
D22NM20
STD22NM20N
STD22NM20NT4
D22NM20N
D22NM
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PDF
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Untitled
Abstract: No abstract text available
Text: EMIF10-LCD01C1 10 LINES EMI FILTER AND ESD PROTECTION IPAD MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : • LCD for Mobile phones ■ Computers and printers ■ Communication systems ■ MCU Boards DESCRIPTION
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EMIF10-LCD01C1
EMIF10-LCD01C1
EMIF10
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PDF
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M48Z35AV
Abstract: SOH28
Text: M48Z35AV 5.0 V or 3.3 V, 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Battery low flag (BOK) ■ Automatic power-fail chip deselect and WRITE
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Original
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M48Z35AV
M48Z35AV:
28-lead
PCDIP28
M48Z35AV
SOH28
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PDF
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STD22NM20N
Abstract: STD22NM20NT4
Text: STD22NM20N N-CHANNEL 200V - 0.088Ω - 22A DPAK ULTRA LOW GATE CHARGE MDmesh II MOSFET Table 1: General Features TYPE STD22NM20N • ■ ■ ■ ■ Figure 1: Package VDSS RDS on ID 200 V < 0.105 Ω 22 A WORLDWIDE LOWEST GATE CHARGE TYPICAL RDS(on) = 0.088 Ω
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STD22NM20N
STD22NM20N
STD22NM20NT4
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PDF
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M25P128 VDFPN8
Abstract: M25P128 MLP8 m25p128 PACKAGE 8x6mm VDFPN8 package M25P128
Text: M25P128 128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface Features • 128-Mbit flash memory ■ 2.7 to 3.6 V single supply voltage ■ SPI bus compatible serial interface ■ 54 MHz clock rate maximum for 65 nm devices ■ VPP = 9 V for fast program/erase mode
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Original
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M25P128
128-Mbit,
54-MHz
128-Mbit
2018h)
20-year
M25P128 VDFPN8
M25P128
MLP8 m25p128 PACKAGE
8x6mm
VDFPN8 package M25P128
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PDF
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Untitled
Abstract: No abstract text available
Text: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 6 5 4 3 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LOC ALL RIGHTS RESERVED. REVISIONS DIST AA 22 LTR DESCRIPTION A REV PER EC 0S1 1 - 0 2 0 1 - 0 4 DATE DWN APVD 09JUN2005 LV SF MATERIAL: HOUSING - HIGH TEM PERATURE
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OCR Scan
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09JUN2005
09JUN2005
31MAR2000
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PDF
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Untitled
Abstract: No abstract text available
Text: THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AA 22 R E V IS IO N S DATE DWN APVD REV PER ECR—0 8 —0 3 2 4 4 7 23FEB2009 DZ SY REVISED PER E C O - 10 - 0 0 0 4 4 4 19JAN 10
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OCR Scan
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23FEB2009
19JAN
81/im
09JUN2005
31MAR2000
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PDF
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Untitled
Abstract: No abstract text available
Text: 7 8 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. 5 6 - ALL RIGHTS RESERVED. 1 8 .54 D C 2 .5 4 + 0 .0 5 B A SUGGESTED PRINTED CIRCUIT BOARD LAYOUT COMPONENT SIDE AMP 4805 REV 31MAR2000 4 3 2 1 REVISIONS
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OCR Scan
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31MAR2000
12NOV07
09JUN2005
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PDF
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Untitled
Abstract: No abstract text available
Text: T H IS D R A W ING IS UNPUBLI S H E D . C O P Y R I G H T 20 RELEASED BY TYCO ELECTRONICS CORPORATION. FOR ALL PUBLICATION RIGHTS LOC REV I S IONS D IS T RESERVED. D E S C R I P T IO N RELEASED REVISED 5 . DATE EC 0 G 3 B - 0 6 I 2E CO- 0 6 - 0 2 2 4 I 6 0 9 JUN2005
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OCR Scan
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0G3B-06I2-REVISED
JUN2005
26SEP2006
09JUN2005
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PDF
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Untitled
Abstract: No abstract text available
Text: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 5 6 4 3 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LOC REVISIONS DIST AA 22 ALL RIGHTS RESERVED. LTR DESCRIPTION A REV PER EC 0S1 1 - 0 2 0 1 - 0 4 DATE DWN APVD 09JU N 2005 JA SF MATERIAL: HOUSING - HIGH TEM P ERATU RE
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OCR Scan
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27yum[
31MAR2000
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PDF
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Untitled
Abstract: No abstract text available
Text: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 5 6 4 3 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AA 22 R E VIS IO N S LTR DESCRIPTION DATE REV PER EC 0S1 1 - 0 2 0 1 - 0 4 A DWN 0 9 JU N 2 0 0 5 LV APVD SF M A T E R IA L :
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UL94V-0.
27/im
27/zm
09JUN2005
09JUN2005
31MAR2000
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PDF
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