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    0C028 Search Results

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    0C028 Price and Stock

    TDK Epcos B82111E0000C028

    FIXED IND 680UH 200MA 14 OHM TH
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey B82111E0000C028 Cut Tape 259 1
    • 1 $1.08
    • 10 $0.842
    • 100 $0.6535
    • 1000 $0.54682
    • 10000 $0.54682
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    B82111E0000C028 Reel 1,000
    • 1 -
    • 10 -
    • 100 -
    • 1000 $0.45051
    • 10000 $0.42163
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    Rochester Electronics LLC XC5204-5PQ160C0280

    FPGA, 120 CLBS, 4000 GATES, 83MH
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey XC5204-5PQ160C0280 Bulk 11
    • 1 -
    • 10 -
    • 100 $29.96
    • 1000 $29.96
    • 10000 $29.96
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    AMD XC5204-5PQ160C0280

    - Trays (Alt: XC5204-5PQ160C0280)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas XC5204-5PQ160C0280 Tray 4 Weeks 13
    • 1 -
    • 10 -
    • 100 $26.2361
    • 1000 $26.2361
    • 10000 $26.2361
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    Moons Industries MU100C028AP

    100W 28V CV driver - Boxed Product (Development Kits) (Alt: MU100C028AP)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas MU100C028AP Box 100
    • 1 -
    • 10 -
    • 100 $32.256
    • 1000 $32.256
    • 10000 $32.256
    		Buy Now

    Moons Industries MU120C028AP

    120W 28V CV driver - Boxed Product (Development Kits) (Alt: MU120C028AP)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas MU120C028AP Box 100
    • 1 -
    • 10 -
    • 100 $34.272
    • 1000 $34.272
    • 10000 $34.272
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    0C028 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    BE5L

    Abstract: CYD18S18V18 CYD09S36V18 CYD18S36V18 SKR 175 FullFlex36
    Text: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with Single Data Rate SDR operation on each port


    Original     		PDF

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36

    0C028

    Abstract: FIPS-140 MPC180 MPC184 MPC185 MPC190 MPC8245 MPC860 SHA-256 457DN
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC1848xxUM 5/2004 REV 1.1 A I CE T T A O D N UT Y O H R IT A W E MPC184 IN NG 8xx Security M HA I Co-Processor L C E User’s Manual TO R T P J EC B U S For More Information On This Product, Go to: www.freescale.com


    Original     		PDF MPC1848xxUM MPC184 CH370 MPC185 0C028 FIPS-140 MPC180 MPC190 MPC8245 MPC860 SHA-256 457DN

    wireless ciphertext

    Abstract: No abstract text available
    Text: MPC1848xxUM/D 3/2003 REV 1 A ICE T T A O D UT N Y O H R A IT W N E MPC184 8xx Security I NG IM HA Co-Processor L E R P SU E J B CT TO C User’s Manual HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217


    Original     		PDF MPC1848xxUM/D MPC184 MPC185 wireless ciphertext

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36

    FullFlex36

    Abstract: CYDXXS36V18 400 OHM RESISTOR DQ67
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 400 OHM RESISTOR DQ67

    0a214

    Abstract: 048E3 09376h 036D3 030B9H 036B6 08d06 09-D2 0A211 0817AH
    Text: TMS320 DSP Number 84E DESIGNER’S NOTEBOOK Speech data for Spanish LPC Day-Time-Stamping DTS on TMS320Cxx Contributed by Gerardo Murillo Design Problem Where can I get Spanish speech data allowing generation of a vocal output for Date and Time Stamping (DTS) and voice prompts ?


    Original     		PDF TMS320 TMS320Cxx 08937h, 08C18h, 01A5Ah, 093EBh 05CC4h, 04752h, 09246h, 07844h, 0a214 048E3 09376h 036D3 030B9H 036B6 08d06 09-D2 0A211 0817AH

    0C314

    Abstract: 09d4e 074c "04AA9H" 0496B TMS320 05c62 0144dh SPSS011B 0c314h
    Text: TMS320 DSP Number 85E DESIGNER’S NOTEBOOK Speech data for German LPC Day-Time-Stamping DTS on TMS320Cxx Contributed by Gerardo Murillo Design Problem Where can I get German speech data allowing generation of a vocal output for Date and Time Stamping (DTS) and voice prompts


    Original     		PDF TMS320 TMS320Cxx 06EA6h, 07164h, 03DCFh, 02E34h 073AAh, 0E53Ch, 0D266h, 007ADh, 0C314 09d4e 074c "04AA9H" 0496B 05c62 0144dh SPSS011B 0c314h

    CYD18S18V18

    Abstract: FullFlex36 CYD09S36V18 CYD18S36V18 ARRAY VCSEL
    Text: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) FullFlex36 FullFlex18 CYD18S18V18 CYD09S36V18 CYD18S36V18 ARRAY VCSEL

    FullFlex36

    Abstract: No abstract text available
    Text: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36

    TMS 1070 NL

    Abstract: BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 36Mx72 TMS 1070 NL BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780

    1023F

    Abstract: SHA-256 mpc190 A-18 A-20 MPC184 MPC184UM a3101 0x0A034 chn 712
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC184UM 5/2004 REV 1.2 A I CE T T A O D N UT Y O H R IT A W E IN NG Co-Processor MPC184 Security M HA User’s Manual I L C E TO R T PCI Interface C P JE B U S For More Information On This Product,


    Original     		PDF MPC184UM MPC184 32-Bit 1023F SHA-256 mpc190 A-18 A-20 MPC184UM a3101 0x0A034 chn 712

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 484-ball 256-ball FullFlex36

    apple ipad

    Abstract: Apple iPad 2 0C028 kpe 153 13008 TRANSISTOR 13408 Apple iPad 2 datasheet ipad apple data sheet FIPS-140 MPC107
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC185UM 12/2003 Rev. 2.3 A I CE T T A O D N UT Y O H R IT A W E IN NG Co-Processor MPC185 Security M HA User’s Manual I L C E TO R T C P JE B U S For More Information On This Product, Go to: www.freescale.com


    Original     		PDF MPC185UM MPC185 CH370 81nductor, apple ipad Apple iPad 2 0C028 kpe 153 13008 TRANSISTOR 13408 Apple iPad 2 datasheet ipad apple data sheet FIPS-140 MPC107

    FullFlex36

    Abstract: No abstract text available
    Text: FullFlex PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36

    FullFlex36

    Abstract: TMS 1070 NL
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36 TMS 1070 NL

    FullFlex36

    Abstract: DQ67L CYD18S72V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 DQ67L CYD18S72V18

    FullFlex36

    Abstract: CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF 72-bit 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18ation FullFlex36 CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18

    Apple iPad 2

    Abstract: apple ipad Apple Authentication coprocessor 0C028 Apple iPad 2 datasheet ipad apple data sheet kpe 153 MPC190 MPC185 1023F
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC185UM 12/2003 Rev. 2.3 A I CE T T A O D N UT Y O H R IT A W E IN NG Co-Processor MPC185 Security M HA User’s Manual I L C E TO R T C P JE B U S For More Information On This Product, Go to: www.freescale.com


    Original     		PDF MPC185UM MPC185 Apple iPad 2 apple ipad Apple Authentication coprocessor 0C028 Apple iPad 2 datasheet ipad apple data sheet kpe 153 MPC190 1023F

    SHA-256

    Abstract: MPC185 MPC190 0C028 FIPS-140 MPC180 MPC184 MPC8245 MPC860 458AN
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MPC1848xxUM 5/2004 REV 1.1 A I CE T T A O D N UT Y O H R IT A W E MPC184 IN NG 8xx Security M HA I Co-Processor L C E User’s Manual TO R T P J EC B U S For More Information On This Product, Go to: www.freescale.com


    Original     		PDF MPC1848xxUM MPC184 MPC185 SHA-256 MPC190 0C028 FIPS-140 MPC180 MPC8245 MPC860 458AN

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 18-Mbit, 36-Mbit FullFlex36

    CYD18S18V18-200BBAXI

    Abstract: FullFlex36 CYD36S18V18-167BGXI
    Text: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR operation on each port


    Original     		PDF FullFlex72 72-bit CYD18S18V18-200BBAXI FullFlex36 CYD36S18V18-167BGXI

    FullFlex36

    Abstract: CYD09S36V18 CYD18S18V18 CYD18S36V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original     		PDF 72-bit 18-Mbit, 36-Mbit FullFlex36 CYD09S36V18 CYD18S18V18 CYD18S36V18

    TMS 1070 NL

    Abstract: CYD09S18V18-167BBXC CYD09S36V18 CYD18S36V18 CYD04S18V18-200BBXC FullFlex36
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original     		PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 36Mx72 TMS 1070 NL CYD09S18V18-167BBXC CYD09S36V18 CYD18S36V18 CYD04S18V18-200BBXC FullFlex36