74151
Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of
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CY7C340
CY7C34X)
65-micron
CY7C34XB)
74151
74151 pin connection
C3406
74151 PIN DIAGRAM
74151 waveform
counter schematic diagram 74161
programmer EPLD
22v10
5192JM
74151 multiplexer
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C3402
Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase
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CY7C340
CY7C34X)
65-micron
CY7C34XB)
C3402
74151
5128LC-1
74151 PIN DIAGRAM
5128LC-2
74151 8 to 1
74151 pin connection
function of 74151
22V10-10C
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74151 PIN DIAGRAM
Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
Text: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase
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CY7C340
CY7C34X)
65-micron
CY7C34XB)
74151 PIN DIAGRAM
74151
22v10
5192JM
CY7C340 PRODUCT CHANGE
PALC22V10B
programmer EPLD
CY7C341B
CY7C342B
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CY7C342B
Abstract: 68-PIN CY7C342B-35RMB
Text: fax id: 6107 1CY 7C34 2B CY7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the CY7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.
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CY7C342B
128-Macrocell
CY7C342B
65-micron
68-pin
CY7C342B-35RMB
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c3466
Abstract: C3461 C3467 b4 c346 diode c346 diode IC 7400 SERIES ALL DATA C346 CY7C346 CY7C346B c3468
Text: fax id: 6104 1CY 7C34 6B CY7C346 CY7C346B 128-Macrocell MAX EPLDs Features ture is 100% user configurable, allowing the devices to accommodate a variety of independent logic functions. • • • • 128 macrocells in 8 LABs 20 dedicated inputs, up to 64 bidirectional I/O pins
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
c3466
C3461
C3467
b4 c346 diode
c346 diode
IC 7400 SERIES ALL DATA
C346
CY7C346
CY7C346B
c3468
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CY7C342B
Abstract: 7C342B-35 68-PIN CY7C342B15HMB CY7C342B-35RMB CY7C342B-35HC
Text: 1CY 7C34 2B CY7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the CY7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.
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CY7C342B
128-Macrocell
CY7C342B
65-micron
68-pin
68-Lead
7C342B-35
CY7C342B15HMB
CY7C342B-35RMB
CY7C342B-35HC
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31-oq
Abstract: 7C342-25 CY7C342-35HMB 7C342-35 CY7C342 CY7C342B OQ11
Text: CY7C342 CY7C342B rif CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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CY7C342
CY7C342B
128-Macrocell
CY7C342)
65-micron
CY7C342B)
68-pin
CY7C342/CY7C342B
CY7C342/
CY7C342B
31-oq
7C342-25
CY7C342-35HMB
7C342-35
OQ11
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84-PIN
Abstract: CY7C341B
Text: CY7C341B y CYPRESS Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and
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CY7C341B
65-micron
84-pin
CY7C341B
CY7C341Bis
35RC/RI
84-Lead
CY7C341Bâ
35HMB
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K12J
Abstract: 100-PIN CY7C346 CY7C346B f 7400
Text: CY7C346 CY7C346B 5T CYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirec tional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346
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CY7C346
CY7C346B
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
128-Macrocell
CY7C346/CY7C346B
CY7C346/
K12J
CY7C346B
f 7400
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C3424
Abstract: 68-PIN 7C342-30 7C342-35 CY7C342 CY7C342B C3422 CY7C342-30HC CY7C342B-30RMB 30RM
Text: CY7C342 CY7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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CY7C342
CY7C342B
128-Macrocell
CY7C342)
65-micron
CY7C342B)
68-pin
CY7C342/CY7C342B
CY7C342/
C3424
7C342-30
7C342-35
C3422
CY7C342-30HC
CY7C342B-30RMB
30RM
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Untitled
Abstract: No abstract text available
Text: '0 CYPRESS Features • 192 m acrocells in 12 L A B s • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and
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CY7C341B
65-micron
84-pin
CY7C341B
16perLAB.
prodB-30HMB
84-Lead
001b741
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Untitled
Abstract: No abstract text available
Text: CY7C342 CY7C342B CYPRESS SEMICONDUCTOR & 128-Macrocell M A X EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC, PGA, and Flatpack
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CY7C342
CY7C342B
128-Macrocell
68-pin
CY7C342/CY7C342B
CY7C342/
CY7C342B
Y7C342B
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CY7C342
Abstract: No abstract text available
Text: CY7C342 CYPRESS SEMICONDUCTOR 128-Macrocell MAX EPLDs The speed and density of the CY7C342 allows it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 25 times the
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CY7C342
128-Macrocell
7400-series
20-pin
CY7C342
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84-PIN
Abstract: CY7C341 CY7C341B
Text: CY7C341B ir CYPRESS . Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and
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CY7C341B
192-Macrocell
65-micron
84-pin
CY7C341Bis
CY7C341Bâ
35JC/JI
84-Lead
CY7C34
CY7C341
|
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Untitled
Abstract: No abstract text available
Text: K? PRELIMINARY ? Js CYPRESS SEMICONDUCTOR = 192-Macrocell MAX EPLD software or by the model shown in Features Logic Array Blocks • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pins • Programmable interconnect array • 384 expander product terms
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192-Macrocell
84-pin
CY7C341.
CY7C341-30RC
tAC02
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Untitled
Abstract: No abstract text available
Text: CYPRESS SEMICONDUCTOR b5E D • SSa^bbS QOlDMbM 27S ■ CYP CY7C341 CY7C341B =- '* ^ 5 = = SEMCONDUCTOR 192-Macrocell MAX EPLD Features Logic Array Blocks • 192 m acrocells in 12 LAlis • 8 dedicated inputs, 64 bidirectional I/O pins • Programmable interconnect array
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CY7C341
CY7C341B
192-Macrocell
84-pin
CY7C341
CY7C341B.
CY7C341â
40RMB
84-Lead
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Untitled
Abstract: No abstract text available
Text: CY7C346 CY7C346B CYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs T h e CY7C346/CY7C346B is an E rasable Program m able Logic Device E P L D in which C M O S E P R O M cells are used to configure logic functions w ithin the device.
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CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346
CY7C346B
128-Macrocell
7C346/CY
7C346B
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tsl-3
Abstract: gear 49t 7C341-40 CY7C341 CY7C341B 38-00137-F 7C341 dd1307h
Text: CY7C341 CY7C341B if CYPRESS Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pins • 0.8-micron double-metal CMOS EPROM technology CY7C341 • Advanced 0.65-micron CMOS technology to increase performance (CY7C341B) • Programmable interconnect array
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CY7C341
CY7C341B
192-Macrocell
CY7C341)
65-micron
CY7C341B)
84-pin
TheCY7C341
andCY7C341Bare
CY7C341/
tsl-3
gear 49t
7C341-40
CY7C341B
38-00137-F
7C341
dd1307h
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G013G
Abstract: 05V3 7C342-30 7C342-35 CY7C342 CY7C342B CY7C342-30RMB K941 12J8 CY7C342-35JC
Text: CY7C342 CY7C342B ^ CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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CY7C342
CY7C342B
128-Macrocell
CY7C342)
65-micron
CY7C342B)
68-pin
CY7C342/CY7C342B
CY7C342/
G013G
05V3
7C342-30
7C342-35
CY7C342-30RMB
K941
12J8
CY7C342-35JC
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Untitled
Abstract: No abstract text available
Text: CY7C346 CY7C346B STCYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirec tional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
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CY7C342B-25HMB
Abstract: CY7C342B-35HMB 68-PIN CY7C342B 415l
Text: # CYPRESS Features • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Advanced 0.65-micron CMOS technology to increase performance • Available in 68-pin HLCC, PLCC, and PGA Functional Description
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CY7C342B
128-Macrocell
65-micron
68-pin
CY7C342B
35HMB
CY7C342Bâ
35RMB
CY7C342B-25HMB
CY7C342B-35HMB
415l
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LE C346
Abstract: 5067B
Text: fax id: 6104 CY7C346 CY7C346B 128-Macrocell MAX EPLDs ture is 100% user configurable, allowing the devices to accom modate a variety of independent logic functions. Featu res • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirectional I/O pins
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
LE C346
5067B
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Untitled
Abstract: No abstract text available
Text: CYPRESS SEMICONDUCTOR 4bE D B 2 5 0 ^ 2 'T 't- l l y - I V 0007103 T I ICYP 0*7 CY7C342 CYPRESS ß r SEMICONDUCTOR • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC,
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CY7C342
68-pin
CY7C342
7400-series
00G7120
tAC02
38-00119-B
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Untitled
Abstract: No abstract text available
Text: CY7C341 CY7C341B ^CYPRESS Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pins • 0.8-micron double-metal CMOS EPROM technology CY7C341 • Advanced 0.65-micron CMOS technology to increase performance (CY7C341B) • Programmable interconnect array
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CY7C341
CY7C341B
CY7C341)
65-micron
CY7C341B)
84-pin
TheCY7C341
CY7C341Bare
CY7C341/
CY7C341Bowed
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