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    Teledyne e2v PALC16R8-40QMB

    PROG. LOGIC DEVICE, UV ERASABLE, 16-INPU - Rail/Tube (Alt: PALC16R8-40QMB)
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    Teledyne e2v PALC16R6-40QMB

    PROG. LOGIC DEVICE, UV ERASABLE, 16-INPU - Rail/Tube (Alt: PALC16R6-40QMB)
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    Teledyne e2v PALC22V10-40QMB

    PROG. LOGIC DEVICE, UV ERASABLE, 22-INPU - Rail/Tube (Alt: PALC22V10-40QMB)
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    Teledyne e2v CY7C277-40QMB

    PROM, UV ERASABLE, 32K X 8, REGISTERED, - Rail/Tube (Alt: CY7C277-40QMB)
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    Cypress Semiconductor PALC22V10-40QMB

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    Bristol Electronics PALC22V10-40QMB 224
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    40QMB Datasheets Context Search

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    transistor c331

    Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
    Text: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the


    Original
    PDF CY7C331 CY7C331 transistor c331 c331 transistor C3318 C3317 C331 C3311 C331 datasheet 20HC c331 equivalent

    transistor c331

    Abstract: c331 transistor c331 c331 equivalent C3318 C3319 C3314 c3317 C3311 transistor c331 datasheet
    Text: fax id: 6016 1CY7C331 CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable


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    PDF 1CY7C331 CY7C331 transistor c331 c331 transistor c331 c331 equivalent C3318 C3319 C3314 c3317 C3311 transistor c331 datasheet

    c331 equivalent

    Abstract: C3317 c331-12 c3311 192x pin diagram c331
    Text: CY7C331 Asynchronous Registered EPLD • Low power — 90 mA typical ICC quiescent Features • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the I/O


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    PDF CY7C331 28-pin c331 equivalent C3317 c331-12 c3311 192x pin diagram c331

    L496D

    Abstract: 9l reset CY7C331 ST L11922 0423-J
    Text: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    PDF CY7C331 28-pin CY7C331 -40TMB 28-Lead CY7C331â 40WMB 28-Lead 300-Mil) L496D 9l reset ST L11922 0423-J

    16L88

    Abstract: PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB
    Text: 256=^2 ooQb^o s d c y p MbE D CYPRESS SEMICONDUCTOR PAL C20 Series ~ SEMICONDUCTOR Features • CMOS EPROM technology for « p ro ­ grammability • High performance at quarter power • — tpo = 25 ns — ts = 20 ns — tco = 15 ns — Ice = 45 mA • High performance at military


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    PDF PALC16R8L-35VC PALC16R8L-35WC PALC16R8â PALC16R8-35PC/PI PALC16R8-35VC/VC PALC16R8-35WCAVC PALC16R8-40DMB PALC16R8-40KMB PALC16R8-40LMB PALC16R8-40QMB 16L88 PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB

    Untitled

    Abstract: No abstract text available
    Text: CY7C277 '# C Y P R E S S Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 30-ns address set-up — 15-ns dock to output • Low power — 660 mW commercial — 715 mW (military) • Programmable address latch enable


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    PDF CY7C277 30-ns 15-ns 300-mil, 28-pin 28-Lead CY7C277â 50WMB 28-Lead

    Untitled

    Abstract: No abstract text available
    Text: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin


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    PDF 28-pin 28-pin termW22 28-Lead 300-Mil) CY7C331 001305b

    C3317

    Abstract: L1190 CY7331
    Text: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all


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    PDF 28-pin 28-Lead 28-Lead 300-Mil) CY7C331 0Dlb56b C3317 L1190 CY7331

    2SUR

    Abstract: CY7C331 L1190 C3317
    Text: CY7C331 ¿F C Y P R E S S Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set, reset, and clock inpnts on all


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    PDF CY7C331 28-pin 40HMB CY7C331â 40LMB 28-Square 40QMB 2SUR L1190 C3317

    Untitled

    Abstract: No abstract text available
    Text: CY7C277 CY7C279 CYPRESS SEMICONDUCTOR Features Reprogrammable 32K x 8 Registered PROM Programmable address latch enable input Programmable synchronous or asynchronous output enable 7C277 On-chip edge-triggered output registers (7C277) Optional registered/latched address


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    PDF CY7C277 CY7C279 7C277) 7C279) 300-mil, 28-pin

    Untitled

    Abstract: No abstract text available
    Text: s rs y CYPRESS SEMICONDUCTOR Features • TWelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers


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    PDF CY7C330 28-pin, 300-mil CY7C330â 28DMB 28HMB 28LMB

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS SEMICONDUCTOR ~ Features • 100-MHz output registered operation • TVelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer


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    PDF CY7C335, CY7C335adless 28-Lead 300-Mil) 28-Pin

    65842

    Abstract: 333Q CERAMIC LEADLESS CHIP CARRIER ci 4030 CY7C277
    Text: CY7C277 CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 30-ns address set-up — 15-ns clock to output • Low power — 660 mW commercial — 715 raW (military) • Programmable address latch enable


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    PDF 30-ns 15-ns 300-mil, 28-pin 15-BIT X1024 CY7C277â 50QMB 32-Pin 65842 333Q CERAMIC LEADLESS CHIP CARRIER ci 4030 CY7C277

    Untitled

    Abstract: No abstract text available
    Text: CY7C277 CYPRESS SEMICONDUCTOR Reprogrammable 32K x 8 Registered PROM • Programmable address latch enable input • Programmable synchronous or asynchronous output enable • On-chip edge-triggered output registers • EPROM technology, 100% programmable


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    PDF CY7C277 300-mil, 28-pin 30-ns 15-ns CY7C277â 40QMB 28-Lead 300-Mil)