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    IBM0418A41NLAB

    Abstract: IBM0418A81NLAB IBM0436A41NLAB IBM0436A81NLAB
    Text: IBM0436A41NLAB IBM0418A41NLAB IBM0418A81NLAB IBM0436A81NLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM . Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • Registered outputs • 30 Ω drivers


    Original     		PDF IBM0436A41NLAB IBM0418A41NLAB IBM0418A81NLAB IBM0436A81NLAB 256Kx36 512Kx18) 128Kx36 256Kx18) crrL3325 IBM0418A41NLAB IBM0436A81NLAB

    IBM0418A8ACLAB

    Abstract: IBM0436A4ACLAB IBM0436A8ACLAB IBM0418A4ACLAB
    Text: . IBM0418A4ACLAB IBM0436A8ACLAB Preliminary IBM0418A8ACLAB IBM0436A4ACLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology


    Original     		PDF IBM0418A4ACLAB IBM0436A8ACLAB IBM0418A8ACLAB IBM0436A4ACLAB 256Kx36 512Kx18) 128Kx36 256Kx18) crlh3320 IBM0418A8ACLAB IBM0436A4ACLAB IBM0436A8ACLAB IBM0418A4ACLAB

    K7D803671B-HC33

    Abstract: K7D803671B-HC30 K7D801871B-HC35 K7D801871B-HC37 K7D803671B K7D803671B-HC25 K7D803671B-HC35 K7D803671B-HC37
    Text: K7D803671B K7D801871B 256Kx36 & 512Kx18 SRAM Document Title 8M DDR SYNCHRONOUS SRAM Revision History Rev No. History Draft Data Remark Rev. 0.0 -Initial document. July. 2000 Advance Rev. 0.1 -ZQ tolerance changed from 10% to 15% Aug. 2000 Advance Rev. 0.2


    Original     		PDF K7D803671B K7D801871B 256Kx36 512Kx18 -HC16 012MAX K7D803671B-HC33 K7D803671B-HC30 K7D801871B-HC35 K7D801871B-HC37 K7D803671B K7D803671B-HC25 K7D803671B-HC35 K7D803671B-HC37

    K7B801825B

    Abstract: K7B803625B
    Text: K7B803625B K7B801825B 256Kx36 & 512Kx18 Synchronous SRAM Document Title 256Kx36 & 512Kx18-Bit Synchronous Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft May. 18 . 2001 Preliminary 0.1 Add x32 org part and industrial temperature part


    Original     		PDF K7B803625B K7B801825B 256Kx36 512Kx18 512Kx18-Bit 119BGA 225MHz K7B801825B K7B803625B

    IBM0418A4ANLAB

    Abstract: IBM0418A8ANLAB IBM0436A4ANLAB IBM0436A8ANLAB
    Text: . Preliminary IBM0418A4ANLAB IBM0418A8ANLAB IBM0436A8ANLAB IBM0436A4ANLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25µ CMOS technology • Synchronous Register-Latch Mode of Operation


    Original     		PDF IBM0418A4ANLAB IBM0418A8ANLAB IBM0436A8ANLAB IBM0436A4ANLAB 256Kx36 512Kx18) 128Kx36 256Kx18) crlL3325 IBM0418A8ANLAB IBM0436A4ANLAB

    IBM0418A41XLAB

    Abstract: IBM0418A81XLAB IBM0436A41XLAB IBM0436A81XLAB
    Text: . Preliminary IBM0418A81XLAB IBM0436A81XLAB IBM0418A41XLAB IBM0436A41XLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology


    Original     		PDF IBM0418A81XLAB IBM0436A81XLAB IBM0418A41XLAB IBM0436A41XLAB 256Kx36 512Kx18) 128Kx36 256Kx18) crrh2516 IBM0418A41XLAB IBM0418A81XLAB IBM0436A41XLAB IBM0436A81XLAB

    K7A801801B

    Abstract: K7A803201B K7A803601B
    Text: K7A803601B K7A803201B K7A801801B PRELIMINARY 256Kx36 & 256Kx32 & 512Kx18 Synchronous SRAM Document Title 256Kx36 & 256Kx32 & 512Kx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History Draft Date Remark Initial draft 1. Delete pass- through


    Original     		PDF K7A803601B K7A803201B K7A801801B 256Kx36 256Kx32 512Kx18 512Kx18-Bit K7A801801B K7A803201B K7A803601B

    K7P801866M

    Abstract: SA12 SA13
    Text: K7P803666M K7P801866M 256Kx36 & 512Kx18 SRAM Document Title 256Kx36 & 512Kx18 Synchronous Pipelined SRAM Revision History Rev. No. History Draft Date Remark Rev. 0.0 Rev. 1.0 - Preliminary specification release - Final specification release Mar. 1999 Nov. 1999


    Original     		PDF K7P803666M K7P801866M 256Kx36 512Kx18 K7P80186SRAM K7P801866M SA12 SA13

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb4 SRAM 9Mb QDR SRAM MT54V512H18E 4-Word Burst FEATURES • 9Mb Density 512Kx18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE operation


    Original     		PDF MT54V512H18E 512Kx18) MT54V512H18E

    K7M801825B

    Abstract: K7M803625B
    Text: K7M803625B K7M801825B Preliminary 256Kx36 & 512Kx18 Flow-Through NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Flow Through NtRAM TM Revision History Rev. No. 0.0 History Draft Date Remark 1. Initial document. May. 18. 2001 Preliminary The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the


    Original     		PDF K7M803625B K7M801825B 256Kx36 512Kx18 512Kx18-Bit K7M801825B K7M803625B

    Untitled

    Abstract: No abstract text available
    Text: K7P803611M K7P801811M 256Kx36 & 512Kx18 SRAM Document Title 256Kx36 & 512Kx18 Synchronous Pipelined SRAM Revision History Rev. No. History Draft Date Remark Rev. 0.0 Rev. 1.0 - Preliminary specification release - Final specification release Mar. 1999 Nov. 1999


    Original     		PDF K7P803611M K7P801811M 256Kx36 512Kx18 K7P80181SRAM

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb4 SRAM 9Mb QDR SRAM MT54V512H18E 4-Word Burst FEATURES • 9Mb Density 512Kx18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE operation


    Original     		PDF 512Kx18) MT54V512H18E

    Untitled

    Abstract: No abstract text available
    Text: K7P803666M K7P801866M 256Kx36 & 512Kx18 SRAM Document Title 256Kx36 & 512Kx18 Synchronous Pipelined SRAM Revision History Rev. No. History Draft Date Remark Rev. 0.0 - Preliminary specification release Mar. 1999 Preliminary Rev. 1.0 - Final specification release


    Original     		PDF K7P803666M K7P801866M 256Kx36 512Kx18

    Untitled

    Abstract: No abstract text available
    Text: KM736V849 KM718V949 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. June. 09. 1998 Preliminary 0.1 1. Changed DC parameters ICC; from 450mA to 420mA at 150MHZ.


    Original     		PDF KM736V849 KM718V949 256Kx36 512Kx18 256Kx36-Bit 450mA 420mA 150MHZ. 119BGA

    GVT71256ZC36B-7.5

    Abstract: CY7C1356A-100AC CY7C1356A GVT71512ZC18
    Text: PRELIMINARY CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 200, 166, 133, and 100 MHz • Fast access time: 3.2, 3.6, 4.2, 5.0 ns


    Original     		PDF CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 256Kx36/512Kx18 GVT71256ZC36B-7.5 CY7C1356A-100AC CY7C1356A GVT71512ZC18

    CY7C1357A

    Abstract: GVT71512ZB18
    Text: 1CY7C1357A PRELIMINARY CY7C1355A/GVT71256ZB36 CY7C1357A/GVT71512ZB18 256Kx36/512Kx18 Flow-Thru SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 133, 117, and 100 MHz • Fast access time: 6.5, 7.0, 7.5, and 8.0 ns


    Original     		PDF 1CY7C1357A CY7C1355A/GVT71256ZB36 CY7C1357A/GVT71512ZB18 256Kx36/512Kx18 CY7C1357A GVT71512ZB18

    Untitled

    Abstract: No abstract text available
    Text: K7N803645M K7N801845M 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz


    Original     		PDF K7N803645M K7N801845M 256Kx36 512Kx18 512Kx18-Bit 167MHz 150MHz 400mA 450mA

    Untitled

    Abstract: No abstract text available
    Text: 512Kx18 Pipelined NtRAMTM KM718V949 Document Title 512Kx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. June. 09. 1998 Preliminary 0.1 1. Changed DC parameters ICC; from 450mA to 420mA at 150MHZ. ISB1; from 10mA to 20mA, I SB2 ; from 10mA to 20mA.


    Original     		PDF KM718V949 512Kx18-Bit 512Kx18 450mA 420mA 150MHZ. 119BGA 100-TQFP-1420A

    Untitled

    Abstract: No abstract text available
    Text: K7A803601B K7A803201B K7A801801B 256Kx36/x32 & 512Kx18 Synchronous SRAM Document Title 256Kx36 & 256Kx32 & 512Kx18-Bit Synchronous Pipelined Burst SRAM Revision History History Draft Date Remark 0.0 Initial draft May. 18 . 2001 Preliminary 0.1 1. Delete pass- through


    Original     		PDF K7A803601B K7A803201B K7A801801B 256Kx36/x32 512Kx18 256Kx36 256Kx32 512Kx18-Bit

    K7n801845m

    Abstract: No abstract text available
    Text: K7N803645M K7N801845M 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History 1. Initial document. Draft Date September. 1997 Remark Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;


    Original     		PDF K7N803645M K7N801845M 256Kx36 512Kx18 512Kx18-Bit 167MHz 150MHz 400mA 450mA K7n801845m

    7C1354V25-100

    Abstract: CY7C1354 CY7C1354V25 CY7C1356V25 R1538
    Text: 356V25 CY7C1354V25 CY7C1356V25 PRELIMINARY 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Pin compatible and functionally equivalent to ZBT™ • Supports 200-MHz bus operations with zero wait states — Data is transferred on every clock


    Original     		PDF 356V25 CY7C1354V25 CY7C1356V25 256Kx36/512Kx18 200-MHz 166-MHz 133-MHz 7C1354V25-100 CY7C1354 CY7C1354V25 CY7C1356V25 R1538

    K7N801845B

    Abstract: K7N803645B
    Text: K7N803645B K7N801845B 256Kx36 & 512Kx18 Pipelined NtRAMTM 8Mb NtRAMTM Specification 100 TQFP with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,


    Original     		PDF K7N803645B K7N801845B 256Kx36 512Kx18 K7N801845B K7N803645B

    Untitled

    Abstract: No abstract text available
    Text: IBM0418A4CXLBB256K x 18 3.3VMMDM17DSU-02 5. IBM0436A4CXLBB128K x 363.3VMMDM17DSU-02 5. Advance IBM0418A8CXLBB IBM0436A8CXLBB IBM0418A4CXLBB IBM0436A4CXLBB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 Organizations


    Original     		PDF IBM0418A4CXLBB256K 3VMMDM17DSU-02 IBM0436A4CXLBB128K IBM0418A8CXLBB IBM0436A8CXLBB IBM0418A4CXLBB IBM0436A4CXLBB 256Kx36 512Kx18)

    ZZ 160 ITT

    Abstract: 36/ZZ 160 ITT
    Text: KM736S849 KM718S949 PRELIMINARY 256Kx36 & 512Kx18 Pipelined NfRAM Document Title 256KX36 & 512Kx18-Bit Pipelined NfRAM™ Revision Historv R ev. No. H isto rv Draft Date R em ark 0.0 1. Initial document. September. 1997 Prelim inary 0.1 1. Changed speed bin from 167MHz to 150MHz


    OCR Scan     		PDF KM736S849 KM718S949 256Kx36 512Kx18 512Kx18-Bit 167MHz 150MHz 150MHz 167MHz ZZ 160 ITT 36/ZZ 160 ITT