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    74 LS 00 NAND GATES Search Results

    74 LS 00 NAND GATES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54H30J Rochester Electronics LLC NAND Gate Visit Rochester Electronics LLC Buy
    DM74LS22J Rochester Electronics LLC DM74LS22 - NAND Logic Gate Visit Rochester Electronics LLC Buy
    54H30J/C Rochester Electronics LLC 54H30 - NAND Gate Visit Rochester Electronics LLC Buy
    946HM/C Rochester Electronics LLC 946 - NAND Gate Visit Rochester Electronics LLC Buy
    54H30W/C Rochester Electronics LLC 54H30 - NAND Gate Visit Rochester Electronics LLC Buy

    74 LS 00 NAND GATES Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    schmitt trigger 4093

    Abstract: D16841 4017 decade counter 1-of-10 dual differential line driver 88c30 HC 4093 4013 astable 16-LINE TO 4-LINE PRIORITY ENCODERS 7 segment 40192 88c29 4011 astable
    Text: Revised April 1999 Functional Selection Table 1999 Fairchild Semiconductor Corporation MS500117.prf www.fairchildsemi.com Functional Selection Table February 1998 Gates Function CROSSVOLT Device Leads FACT FAST FASTr ALS AS LS S TTL ABT VCX LCX LVX LVT LVQ AC ACT


    Original     		MS500117 schmitt trigger 4093 D16841 4017 decade counter 1-of-10 dual differential line driver 88c30 HC 4093 4013 astable 16-LINE TO 4-LINE PRIORITY ENCODERS 7 segment 40192 88c29 4011 astable PDF

    TTL LS 7400

    Abstract: 74 LS 00 Logic Gates Advanced Schottky Family 4 bit barrel shifter LS 00 Logic Gates ls 7400 7400 ls 74lsxxx TTL 7400 LS TTL family characteristics
    Text: Selection Information FAST/LS TTL FAST AND LS TTL 1 GENERAL INFORMATION TTL in Perspective FAST is manufactured on Motorola’s MOSAIC oxideisolated process.This process provides FAST with inherent speed/power advantages over the older junction-isolated 74S


    Original     		PDF

    optocoupler NAND

    Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler
    Text: VHCT VHC LVXU LVCU LVCH X X X X X X X X X X X X X X STD X X X X X OL X LVX X X LVU X X LVT X LVQ X LVC X X X X X X X X X X X X X LV LCX X LS HCT HCU HC FCT F BCT ALS AL ACTQ ACT AC ABT xxx 74xxx Gates AND OR NAND NOR Quad 2-input 08 Quad 2-input o.c. 09 Triple 3-input


    Original     		74xxx 13-input UK315358 optocoupler NAND 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler PDF

    74vhc

    Abstract: TSSOP14 TSSOP20 pcb 4000B AC245 HC245 LCX16245 LVQ245 LVX245 VCX16245
    Text: AC245: 7ns VHC245: 7ns HC245: 12ns LVQ245: LVX245: LCX16245: VCX16245: 10ns 8ns 4.5ns 2.5ns VCX16245: 3.2ns VCX16245: 5.7ns HC/HCT FAST/AS/ALS AC/ACT BICMOS ST’s CMOS Logic Roadmap VHC/VHCT 3-VOLTS Design-In VCC 12V 5.0V 4000B LS S/T TL OTHERS Obsolescence


    Original     		AC245: VHC245: HC245: LVQ245: LVX245: LCX16245: VCX16245: 4000B 74vhc TSSOP14 TSSOP20 pcb 4000B AC245 HC245 LCX16245 LVQ245 LVX245 VCX16245 PDF

    DN74LS20

    Abstract: MA161
    Text: LS T T L DN74LS Series DN74LS20 DN74LS20 5 rO 74 U 5U3 Dual 4 - input P o sitiv e NAND Gates H Description P-1 DN74LS20 contains two 4-input positive isolation NAND gate circuits. I Features • • • • Low power consumption Pd = 4m W typical High speed (tpd = 10ns typical)


    OCR Scan     		DN74LS DN74LS20 DN74LS20 14-pin SO-14D) DN741S20 CL-15pF, MA161 PDF

    ls 7400

    Abstract: 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table
    Text: Signetìcs I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TY PE T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU P P LY C U R R E N T TO T A L 9ns 8m A 74LS00 9.5ns 1.6mA 74SOO 3ns 15m A 7400 ORDERING CODE C O M M E R C IA L RA NG E


    OCR Scan     		74LS00 74SOO N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul WF07570S ls 7400 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. PDF

    HBF4727A

    Abstract: ZD 607 - triac ZD 607 - triac circuit hbf 4727a TDA3310 hbf4727 HBF4740 DTL-930 7-stage frequency divider BF479S
    Text: / h o f t f o f m A T E ^SEMICONDUCTOR “ PRODUCTS 1979/80 I NT RODUCTI ON This publication aims to provide condensed information on the vast range of standard devices currently produced by SGS-ATES. For easy consultation the products have been divided into several sections according to the main product


    OCR Scan     		PDF

    74HCoo

    Abstract: TTL 74HC00 74LS00 pinout pin diagram of 74ls00 74HC00 GD74HC00 logic symbol 74LS00 74hc00 and gates pin configuration logic symbol 74LS00 74LS00 gate diagram
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. GD74HCT00 GD54HCT00 74HCoo TTL 74HC00 74LS00 pinout pin diagram of 74ls00 74HC00 GD74HC00 logic symbol 74LS00 74hc00 and gates pin configuration logic symbol 74LS00 74LS00 gate diagram PDF

    TTL 7411

    Abstract: PIN CONFIGURATION 7410 74LS11 function table TTL LS 7411 74 LS 00 Logic Gates LS 7411 74LS10 pin configuration TTL 7410 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10
    Text: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Logic Products Triple Three-Input NAND '10 , AND ('11) Gates Product Specification I TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6mA 74LS10 10ns 1.2mA 74S10 3ns 12mA 7411 10ns 11mA


    OCR Scan     		74LS10 74S10 74LS11 74S11 N7410N, N74LS10N, N74S10N N7411N, N74LS11N, N74S11N TTL 7411 PIN CONFIGURATION 7410 74LS11 function table TTL LS 7411 74 LS 00 Logic Gates LS 7411 74LS10 pin configuration TTL 7410 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10 PDF

    TTL LS 7413

    Abstract: 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n
    Text: 7413, LS13 Signetics Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic Products DESCRIPTION T h e '1 3 contains tw o 4-input N A N D gates which accept standard T T L input signals and provide standard T T L output levels. Th ey are capable of transforming


    OCR Scan     		OP01670S P016B0S TTL LS 7413 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n PDF

    FZH 191

    Abstract: FZJ 101 FZH 261 fzh 111 fzh 171 FZH111 FZH 101 FZH 161 fzh 141 fzh 281
    Text: Elektronik. Wir bauen die Elemente. • VflLVO Professionelle Integrierte Schaltungen, Mikroprozessoren Produktprogramm Elektronik. Wir bauen die Elemente Unser Arbeitsgebiet - besonders die M ikroelektronik - entwickelt sich im m er rascher zum M otor für eine


    OCR Scan     		Integrie8510. FZH 191 FZJ 101 FZH 261 fzh 111 fzh 171 FZH111 FZH 101 FZH 161 fzh 141 fzh 281 PDF

    74 LS 00 Nand Gates

    Abstract: No abstract text available
    Text: LS T T L DN74LS Series DN74LS26 DN74LS26 J>M 74 l -i 2^ Quad 2 - input High-Voltage Interface P ositive NAND Gates I Description D N 7 4 L S 2 6 c o n ta in s b u ffe r gate c irc u its. P-1 fo u r 2 -in p u t p o sitiv e iso la tio n N A N D I Features •


    OCR Scan     		DN74LS DN74LS26 14-pin SO-14DI CL-15pF, 74 LS 00 Nand Gates PDF

    DN74LS22

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series DN74LS22 DN741S22 bio 74. l S Q 2^ Dual 4-input P ositive NAND Gates with Open Collector Outputs • Description P-1 D N 7 4 L S 2 2 c o n ta in s tw o 4 -in p u t p o sitiv e is o la tio n N A N D gate c irc u its w ith o p e n c o lle c to r o u tp u ts .


    OCR Scan     		DN74LS DN741S22 DN74LS22 14-pin SO-14D) CL-15pF, PDF

    28B LM

    Abstract: DM54LS26J DM54LS26W DM74LS26 DM74LS26M DM74LS26N J14A M14A N14A W14B
    Text: DM74LS26 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which perform s the logic N AND function. The open-collector out­ puts require external pull-up resistors for proper logical o p ­


    OCR Scan     		DM74LS26 28B LM DM54LS26J DM54LS26W DM74LS26 DM74LS26M DM74LS26N J14A M14A N14A W14B PDF

    ic 74 LS 138 DECODER

    Abstract: Alu 181 8 bit bcd adder/subtractor f245 motorola lal 2084 TTL 74-series IC LIST internal circuitry for sr flip flop T flip flop IC LS248 4-bit bcd subtractor
    Text: SG 6 0R 4 Schottky TTL • O v e r 180 LS Devices • ALS • FAST • TTL C o m p a tib le M acrocell A rra y s • RAMs • PR O M s 006844 /y err This Material Copyrighted By Its Respective Manufacturer General Inform ation TTL in Perspective proved speed — p o w e r product co m p ared to LS as a


    OCR Scan     		SG60R4 16-by-4 ic 74 LS 138 DECODER Alu 181 8 bit bcd adder/subtractor f245 motorola lal 2084 TTL 74-series IC LIST internal circuitry for sr flip flop T flip flop IC LS248 4-bit bcd subtractor PDF

    74ls ttl 132

    Abstract: 74132 LS132 74132 SIGNETICS 74LS132 74132 quad 2-input NAND with Schmitt trigger 74132 data 74 ls132 1N3064 1N916
    Text: Signetics 74132, LS132 Schmitt Triggers Quad 2-Input NAND Schmitt Trigger Product Specification Logic Products Th e '1 3 2 contains four 2-input N A N D gates which accept standard T T L input signals and provide standard T T L output levels. They are capable of transforming


    OCR Scan     		transitionOP01670S LS132 74ls ttl 132 74132 LS132 74132 SIGNETICS 74LS132 74132 quad 2-input NAND with Schmitt trigger 74132 data 74 ls132 1N3064 1N916 PDF

    7400 signetics

    Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
    Text: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E


    OCR Scan     		74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul 7400 signetics 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL PDF

    1 bit full adder with carry

    Abstract: 1-Bit full adder 1d1200a RS flip flop cmos
    Text: MATRA MbE D M H S ES SfiböMSb Q Q Q Q S Ô 7 b SMMHS 'T - r X - MAY 1988 PRELIMINARY DATA SHEET OPEN ASIC MA GATE ARRAY SERIES - 3 M/ l METAL LAYER MA 0250 - MA 0400 - M A 0800 - M A 1200 H ATURSS • HIGH SPEED CMOS: 2 NS/GATE TYPICAL PROPAGATION DELAY • LOW CONSUMPTION:


    OCR Scan     		MIL883B 1 bit full adder with carry 1-Bit full adder 1d1200a RS flip flop cmos PDF

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76 PDF

    J14A

    Abstract: DM54 DM5426 DM5426J DM74 DM7426 DM7426N N14A
    Text: E M IC D N D U C T O R t DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs General Description Pull-Up Resistor Equations T h is d e v ic e c o n ta in s fo u r in d e p e n d e n t g a te s e a c h o f w h ic h p e rfo rm s th e lo g ic N A N D fu n c tio n . T h e o p e n -c o lle c to r o u t­


    OCR Scan     		DM7426 DM5426J 14-Lead DM7426N J14A DM54 DM5426 DM74 DM7426 N14A PDF

    pin configuration 74LS10

    Abstract: M74HC10P 4000B 74LS10 M74HC10 M74HC10DP of IC 74ls10 CMOS 74LS10 logic diagram of IC 74ls10 74LS10 mitsubishi
    Text: M IT S U B IS H I HIGH S P E E D C M O S M74HC10P M74HC10DP T R IP L E 3 -IN P U T P O S IT IV E NAND G A TE DESCRIPTION The M 74H C 10 is a sem iconductor integrated circu it con­ sisting of three 3-input p o sitive-lo gic PIN CONFIGURATION TOP VIEW NAND, usable as


    OCR Scan     		M74HC10P M74HC10DP M74HC10 pin configuration 74LS10 4000B 74LS10 M74HC10DP of IC 74ls10 CMOS 74LS10 logic diagram of IC 74ls10 74LS10 mitsubishi PDF

    m60013

    Abstract: M60016 m60011 M60014 z46n M60030 M60024 Z24N M60012 m60043
    Text: A m its u b is h i CMOS GATE ARRAYS ELECTRONIC DEVICE GROUP Mitsubishi CMOS Gate Arrays INTRODUCTION Mitsubishi offers three fami­ lies of CMOS gate arrays: 1.0 /im, 1.3 /j.m, and 2.0 ji.m, with usable gates ranging from 200 to 35,000. The 1.0 and 1.3 p.m devices are


    OCR Scan     		MDS-GA-11-90-RK m60013 M60016 m60011 M60014 z46n M60030 M60024 Z24N M60012 m60043 PDF

    DM74367

    Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
    Text: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,


    OCR Scan     		PDF