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    74LVQ74 Search Results

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    74LVQ74 Price and Stock

    onsemi 74LVQ74SC

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey 74LVQ74SC Tube 1,100
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    Rochester Electronics LLC 74LVQ74SC

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey 74LVQ74SC Tube 1,158
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    onsemi 74LVQ74SCX

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey 74LVQ74SCX Reel 2,500
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    Rochester Electronics LLC 74LVQ74SCX

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey 74LVQ74SCX Bulk 1,344
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    STMicroelectronics 74LVQ74MTR

    IC FF D-TYPE DUAL 1BIT 14SOP
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    74LVQ74 Datasheets (31)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVQ74 Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74 Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74 STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Original PDF
    74LVQ74 STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Original PDF
    74LVQ74 STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Original PDF
    74LVQ74M STMicroelectronics Dual D-Type Flip Flop with Preset and Clear Original PDF
    74LVQ74M STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Original PDF
    74LVQ74M STMicroelectronics Flip-Flop, Positive-Edge, D Flip-Flop, 2-Element, 1-Input, 14-SOP Original PDF
    74LVQ74M STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    74LVQ74MTR STMicroelectronics Flip-Flop, Positive-Edge, D Flip-Flop, 2-Element, 1-Input, 14-SOP Original PDF
    74LVQ74MTR STMicroelectronics Dual D-Type Flip Flop with Preset and Clear Original PDF
    74LVQ74MTR STMicroelectronics DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR Original PDF
    74LVQ74SC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74SC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74SC National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74SC National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Scan PDF
    74LVQ74SCX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74SCX National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVQ74SCX National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Scan PDF
    74LVQ74SJ Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF

    74LVQ74 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVQ74

    Abstract: 74LVQ74M 74LVQ74T TSSOP14
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 LVQ74 74LVQ74 74LVQ74M 74LVQ74T TSSOP14

    74LVQ74

    Abstract: 74LVQ74MTR 74LVQ74TTR TSSOP14
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 74LVQ74 74LVQ74MTR 74LVQ74TTR TSSOP14

    LVQ74

    Abstract: 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D
    Text: Revised June 2001 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LVQ74 LVQ74 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D

    113003

    Abstract: 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D
    Text: 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LVQ74 LVQ74 113003 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D

    74LVQ74

    Abstract: LVQ74 74LVQ74M 74LVQ74T TSSOP14
    Text: 74LVQ74  DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 LVQ74 P013G TSSOP14 74LVQ74 74LVQ74M 74LVQ74T

    74LVQ74

    Abstract: 74LVQ74M 74LVQ74MTR 74LVQ74TTR TSSOP14
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 74LVQ74 74LVQ74M 74LVQ74MTR 74LVQ74TTR TSSOP14

    74LVQ74

    Abstract: 74LVQ74MTR 74LVQ74TTR TSSOP14
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 74LVQ74MTR 74LVQ74TTR 74LVQ74 74LVQ74MTR 74LVQ74TTR TSSOP14

    74LVQ74

    Abstract: TSSOP14 74LVQ74M 74LVQ74T
    Text: 74LVQ74  DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 LVQ74 74LVQ74 TSSOP14 74LVQ74M 74LVQ74T

    74LVQ74

    Abstract: No abstract text available
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 74LVQ74M 74LVQ74T 74LVQ74

    74LVQ74

    Abstract: 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D 11347
    Text: 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on the


    Original     		PDF 74LVQ74 LVQ74 74LVQ74 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D 11347

    74LVQ74

    Abstract: 74LVQ74M 74LVQ74MTR 74LVQ74TTR TSSOP14
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVQ74 74LVQ74 74LVQ74M 74LVQ74MTR 74LVQ74TTR TSSOP14

    master slave jk flip flop

    Abstract: ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D
    Text: Logic Products by Function Flip-Flop Products Logic Product Family Product Description Package Voltage Node 74ACT109 FACT ACT Dual JK Positive Edge-Triggered Flip-Flop DIP SOIC TSSOP 5 DM74LS73A Bipolar-LS Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary


    Original     		PDF 74ACT109 DM74LS73A MM74C73 74AC74 74ACT74 74ACTQ74 16-Bit 74VCXH162374 SCAN182374A master slave jk flip flop ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    SO14

    Abstract: TSSOP14 SO-14 TSSOP-14 TSSOP16 TSSOP-16 74LVQ02 74LVQ04 74LVQ125 74LVQ14
    Text: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LVQ 74LVQ SERIES FEATURES Symbol VCC VI TA IOL tpd Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Output Current Propagation Delay time @ VCC = 3.3V Value Unit 3.0 to 3.6 0 to VCC – 40 to 85


    Original     		PDF 74LVQ 74LVQ244 74LVQ00 74LVQ02 74LVQ04 74LVQ08 74LVQ14 74LVQ32 74LVQ74 74LVQ86 SO14 TSSOP14 SO-14 TSSOP-14 TSSOP16 TSSOP-16 74LVQ02 74LVQ04 74LVQ125 74LVQ14

    LVQ74

    Abstract: No abstract text available
    Text: b4E ]> m bSGllES ÜQ7b3ö‘i Sbb « N S C 1 LVQ74 54LVQ/74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: LOW input to S o Set sets Q to HIGH level LO W input to (3d (Clear) sets Q to LOW level Clear and Set are independent of clock


    OCR Scan     		PDF LVQ74 54LVQ/74LVQ74 LVQ74

    74LVQ74

    Abstract: 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D
    Text: r~O > National Semiconductor 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, <3 outputs. Information at the input is transferred to the outputs on the


    OCR Scan     		PDF 74LVQ74 LVQ74 bS0112E 74LVQ74 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D

    74LVQ74

    Abstract: 74LVQ74SC 74LVQ74SJ M14A M14D
    Text: EM ICDNDUCTOR t 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description ~ L O W in p u t to C D C le a r s e ts Q to L O W level T h e L V Q 7 4 is a dua l D -ty p e flip -flo p w ith A s y n c h ro n o u s C le a r a n d S e t in p u ts a n d c o m p le m e n ta ry (Q , Q ) o u tp u ts . In­


    OCR Scan     		PDF 74LVQ74 LVQ74 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D

    LVQ74

    Abstract: No abstract text available
    Text: LVQ74 Eg National ÆM Semiconductor 54LVQ/74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: LOW input to 3 d Set sets Q to HIGH level LOW input to C q (Clear) sets Q to LOW level Clear and Set are independent of clock


    OCR Scan     		PDF LVQ74 54LVQ/74LVQ74 LVQ74 74LVQ

    74LVQ74

    Abstract: No abstract text available
    Text: 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR . HIGHSPEED: fM A X = 250 MHz TYP. at Vcc =3.3V . COMPATIBLE WITH TTL OUTPUTS • LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.2 V (TYP.) at V c c = 3.3V . 75Q TRANSMISSION LINE DRIVING


    OCR Scan     		PDF 74LVQ74 LVQ74 74LVQ74

    74LVQ74

    Abstract: No abstract text available
    Text: Æ T S G S -T H O M S O N D lsi S IILICTIs! iD©S 74LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR . HIGHSPEED: fMAX =250 MHz (TYP.) at Vcc =3.3V . COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 |xA (MAX.) at TA = 25 °C . LOW NOISE: V olp = 0.2 V (TYP.) at Vcc = 3.3V


    OCR Scan     		PDF 74LVQ74 LVQ74 INVERTIP013G TSS0P14 74LVQ74

    Untitled

    Abstract: No abstract text available
    Text: E M IC O N D U C T Q R r 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. In­ formation at the input is transferred to the outputs on the


    OCR Scan     		PDF 74LVQ74 LVQ74

    LVQ74

    Abstract: No abstract text available
    Text: LVQ74 National Semiconductor 74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inpLts and complementary Q, Ü outputs. Information at the Input is transferred to the outputs on the


    OCR Scan     		PDF LVQ74 74LVQ74 LVQ74

    74LVQ74

    Abstract: KHN 10 74LVQ74M 74LVQ74T TSSOP14
    Text: = 7 SGS-THOMSON k 7# R f f l D i S ^ l l l L [ l e T n ^ D S ! l D © S 74LVQ74 DUAL D-TYPE FLIP FLOP W ITH PR ESET AND CLEAR . . HIGHSPEED: =250 MHz (TYP. at Vcc =3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: Ic e = 2 |xA (MAX.) at T A = 25 °C


    OCR Scan     		PDF 74LVQ74 LVQ74 doubl19 P013G TSSOP14 74LVQ74 KHN 10 74LVQ74M 74LVQ74T

    Untitled

    Abstract: No abstract text available
    Text: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014


    OCR Scan     		PDF 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX86 74LCX125 74LCX240