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    74AUP1G32 Search Results

    74AUP1G32 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74AUP1G32YZPR Texas Instruments Low-Power Single 2-Input Positive-OR Gate 5-DSBGA -40 to 85 Visit Texas Instruments Buy
    SN74AUP1G32DBVT Texas Instruments Low-Power Single 2-Input Positive-OR Gate 5-SOT-23 -40 to 85 Visit Texas Instruments Buy
    SN74AUP1G32DSFR Texas Instruments Low-Power Single 2-Input Positive-OR Gate 6-SON -40 to 85 Visit Texas Instruments Buy
    SN74AUP1G32DSF2 Texas Instruments Low-Power Single 2-Input Positive-OR Gate 6-SON -40 to 85 Visit Texas Instruments Buy
    SN74AUP1G32DPWR Texas Instruments Low-Power Single 2-Input Positive-OR Gate 5-X2SON -40 to 85 Visit Texas Instruments Buy
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    74AUP1G32 Price and Stock

    Texas Instruments SN74AUP1G32DSFR

    IC GATE OR 1CH 2-INP 6SON
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    DigiKey SN74AUP1G32DSFR Digi-Reel 29,910 1
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    Nexperia 74AUP1G32GW,125

    IC GATE OR 1CH 2-INP 5TSSOP
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    Avnet Asia 74AUP1G32GW,125 57,000 6 Weeks 15,000
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    Texas Instruments SN74AUP1G32DPWR

    IC GATE OR 1CH 2-INP 4X2SON
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    Diodes Incorporated 74AUP1G32FX4-7

    IC GATE OR 1CH 2-INP DFN1409-6
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    Diodes Incorporated 74AUP1G32FW5-7

    IC GATE OR 1CH 2-INP DFN1010-6
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    74AUP1G32 Datasheets (64)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP1G32 Diodes SINGLE 2 INPUT POSITIVE OR GATE Original PDF
    74AUP1G32 NXP Semiconductors Advanced ultra-low-power CMOS logic; NXP ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx Original PDF
    74AUP1G32 Philips Semiconductors Low-power 2-input OR gate Original PDF
    74AUP1G3208 Philips Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GF NXP Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GF Philips Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GF,132 NXP Semiconductors Low-power 3-input OR-AND gate; Package: SOT891 (XSON6); Container: Tape reel smd Original PDF
    74AUP1G3208GF,132 NXP Semiconductors 74AUP1G3208 - IC AUP/ULP/V SERIES, 3-INPUT OR-AND GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G3208GF/S500 NXP Semiconductors 74AUP1G3208GF/S500 - Low-power 3-input OR-AND gate, SOT891 Package Original PDF
    74AUP1G3208GM Philips Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GM,115 NXP Semiconductors Low-power 3-input OR-AND gate; Package: SOT886 (XSON6); Container: Tape reel smd Original PDF
    74AUP1G3208GM,115 NXP Semiconductors 74AUP1G3208 - IC AUP/ULP/V SERIES, 3-INPUT OR-AND GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6, Gate Original PDF
    74AUP1G3208GM,132 NXP Semiconductors Low-power 3-input OR-AND gate; Package: SOT886 (XSON6); Container: Tape reel smd Original PDF
    74AUP1G3208GM,132 NXP Semiconductors 74AUP1G3208 - IC AUP/ULP/V SERIES, 3-INPUT OR-AND GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6, Gate Original PDF
    74AUP1G3208GM-G NXP Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GM-G NXP Semiconductors 74AUP1G3208GM - Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GN NXP Semiconductors Low-power 3-input OR-AND gate Original PDF
    74AUP1G3208GN,132 NXP Semiconductors 74AUP1G3208GN - Low-power 3-input OR-AND gate, SOT1115 Package Original PDF
    74AUP1G3208GN/S50H Nexperia 74AUP1G3208 - LOW-POWER 3-INPUT Original PDF
    74AUP1G3208GS NXP Semiconductors Low-power 3-input OR-AND gate Original PDF

    74AUP1G32 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32-Q100 Low-power 2-input OR-gate Rev. 2 — 4 July 2013 Product data sheet 1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32-Q100 74AUP1G32-Q100 74AUP1G32

    74AUP1G32

    Abstract: 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 21 July 2006 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203

    74AUP1G3208

    Abstract: 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 3 — 11 October 2010 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B x C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.


    Original     		PDF 74AUP1G3208 74AUP1G3208 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single 2-input positive OR gate with a standard


    Original     		PDF 74AUP1G32 74AUP1G32 DS35154

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 4 — 23 November 2011 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    74AUP1G32

    Abstract: A115-A C101 SOT-665 74AUP1G32D sot665 equivalent
    Text: 74AUP1G32 Low power single 2-input OR gate Features • High speed: tPD = 5.8 ns max. at VCC = 2.3 V ■ Power down protection on inputs and outputs ■ Balanced propagation delays: tPLH ≈ tPHL ■ Operating voltage range: VCC (opr) = 1.2 to 3.6 V ■


    Original     		PDF 74AUP1G32 000-V A114-A) A115-A) OT-665 74AUP1G32 A115-A C101 SOT-665 74AUP1G32D sot665 equivalent

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. ( Top View ) ( Top View ) The 74AUP1G32 is a single 2-input positive OR gate with a standard


    Original     		PDF 74AUP1G32 74AUP1G32 X2-DFN0808-4 DS35154

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32-Q100 Low-power 2-input OR-gate Rev. 1 — 20 March 2013 Product data sheet 1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32-Q100 74AUP1G32-Q100 74AUP1G32

    74AUP1G32

    Abstract: 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 01 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203

    74AUP1G3208

    Abstract: 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 01 — 29 November 2006 Product data sheet 1. General description The 74AUP1G3208 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G3208 74AUP1G3208 74AUP1ons 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power buffer with open-drain and buffer Rev. 6 — 5 July 2013 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single 2-input positive OR gate with a standard


    Original     		PDF 74AUP1G32 74AUP1G32 DS35154

    74AUP1G3208

    Abstract: 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW JESD22-A114-C
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 01.00 — 17 January 2006 Preliminary data sheet 1. General description The 74AUP1G3208 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP1G3208 74AUP1G3208 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW JESD22-A114-C

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 5 — 28 June 2012 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    74AUP1G3208

    Abstract: 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW JESD22-A114E
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 02 — 3 July 2009 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B x C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.


    Original     		PDF 74AUP1G3208 74AUP1G3208 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW JESD22-A114E

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 5 — 22 June 2012 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B x C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.


    Original     		PDF 74AUP1G3208 74AUP1G3208

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low power single 2-input OR gate Features • High speed: tPD = 5.8 ns max. at VCC = 2.3 V ■ Power down protection on inputs and outputs ■ Balanced propagation delays: tPLH ≈ tPHL ■ Operating voltage range: VCC (opr) = 1.2 to 3.6 V ■


    Original     		PDF 74AUP1G32 000-V A114-A) A115-A) OT-665 74AUP1G32

    74AUP1G32GF

    Abstract: 74AUP1G32 74AUP1G32GM 74AUP1G32GW
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 3 — 12 October 2010 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 7 — 8 July 2013 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 5 — 22 June 2012 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B x C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.


    Original     		PDF 74AUP1G3208 74AUP1G3208

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 4 — 23 November 2011 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B  C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.


    Original     		PDF 74AUP1G3208 74AUP1G3208 dow17

    74AUP1G126

    Abstract: 74AUP1G32 JESD22-A114E 74AUP1T1326
    Text: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.


    Original     		PDF 74AUP1T1326 74AUP1T1326 74AUP1G32 74AUP1G126. 74AUP1G126 JESD22-A114E

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS