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    74AUP1G32GF Search Results

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    74AUP1G32GF Price and Stock

    Rochester Electronics LLC 74AUP1G32GF,132

    IC GATE OR 1CH 2-INP 6XSON
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    DigiKey 74AUP1G32GF,132 Bulk 785,000 1,782
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    Nexperia 74AUP1G32GF,132

    IC GATE OR 1CH 2-INP 6XSON
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    DigiKey 74AUP1G32GF,132 Reel
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    Avnet Americas 74AUP1G32GF,132 Reel 4 Weeks 2,145
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    Verical 74AUP1G32GF,132 2,002 713
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    Arrow Electronics 74AUP1G32GF,132 2,002 713
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    Rochester Electronics 74AUP1G32GF,132 3,205 1
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    Chip1Stop 74AUP1G32GF,132 Cut Tape 4,748
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    74AUP1G32GF,132 3,670
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    74AUP1G32GF,132 2,002
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    NXP Semiconductors 74AUP1G32GF/S708,147

    74AUP1G32GF - OR GATE, AUP/ULP/V SERIES, - Tape and Reel (Alt: 74AUP1G32GF/S708,1)
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    Avnet Americas 74AUP1G32GF/S708,147 Reel 4 Weeks 1,886
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    Rochester Electronics 74AUP1G32GF/S708,147 215,000 1
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    NXP Semiconductors 74AUP1G32GF,132

    74AUP1G32GF - OR Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, XSON6 '
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    Rochester Electronics 74AUP1G32GF,132 1
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    Chip 1 Exchange 74AUP1G32GF,132 4,771
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    74AUP1G32GF Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP1G32GF NXP Semiconductors Low-power 2-input OR gate Original PDF
    74AUP1G32GF NXP Semiconductors 74AUP1G32 - IC AUP/ULP/V SERIES, 2-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G32GF,132 NXP Semiconductors Low-power 2-input OR gate; Package: SOT891 (XSON6); Container: Tape reel smd Original PDF
    74AUP1G32GF,132 NXP Semiconductors 74AUP1G32 - IC AUP/ULP/V SERIES, 2-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF

    74AUP1G32GF Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AUP1G32

    Abstract: 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 21 July 2006 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203

    SOT-353

    Abstract: No abstract text available
    Text: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V


    Original     		PDF 74AUP1Gxx 74AUP1G86FZ4-7 DFN1410 SN74AUP1G86DRYR 74AUP1G86GM 74AUP1G86FW4-7 DFN1010 SN74AUP1G86DSFR 74AUP1G86GF 74AUP1G125SE-7 SOT-353

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 4 — 23 November 2011 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power buffer with open-drain and buffer Rev. 6 — 5 July 2013 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 5 — 28 June 2012 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 5 — 28 June 2012 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    74AUP1G32GF

    Abstract: 74AUP1G32 74AUP1G32GM 74AUP1G32GW
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 3 — 12 October 2010 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR-gate Rev. 7 — 8 July 2013 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP1G32 74AUP1G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP1G32 74AUP1G32