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    74AUP2G17GM Search Results

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    74AUP2G17GM Price and Stock

    Nexperia 74AUP2G17GM,132

    IC BUFFER NON-INVERT 3.6V 6XSON
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    DigiKey 74AUP2G17GM,132 Cut Tape 3,675 1
    • 1 $0.24
    • 10 $0.165
    • 100 $0.1248
    • 1000 $0.10371
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    74AUP2G17GM,132 Digi-Reel 3,675 1
    • 1 $0.24
    • 10 $0.165
    • 100 $0.1248
    • 1000 $0.10371
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    74AUP2G17GM,132 Reel 5,000
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    Avnet Americas 74AUP2G17GM,132 Reel 6 Weeks 10,000
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    Mouser Electronics 74AUP2G17GM,132 1,351
    • 1 $0.24
    • 10 $0.146
    • 100 $0.109
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    TTI 74AUP2G17GM,132 Reel 5,000
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    Avnet Silica 74AUP2G17GM,132 8 Weeks 5,000
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    EBV Elektronik 74AUP2G17GM,132 8 Weeks 5,000
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    Nexperia 74AUP2G17GM,115

    IC BUFFER NON-INVERT 3.6V 6XSON
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74AUP2G17GM,115 Cut Tape 980 1
    • 1 $0.25
    • 10 $0.173
    • 100 $0.131
    • 1000 $0.10899
    • 10000 $0.1035
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    74AUP2G17GM,115 Digi-Reel 980 1
    • 1 $0.25
    • 10 $0.173
    • 100 $0.131
    • 1000 $0.10899
    • 10000 $0.1035
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    74AUP2G17GM,115 Reel 5,000
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    • 10000 $0.08185
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    Avnet Americas 74AUP2G17GM,115 Reel 6 Weeks 10,000
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    • 10000 $0.21311
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    Mouser Electronics 74AUP2G17GM,115 8,795
    • 1 $0.25
    • 10 $0.153
    • 100 $0.114
    • 1000 $0.105
    • 10000 $0.08
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    Rochester Electronics 74AUP2G17GM,115 5,000 1
    • 1 $0.0726
    • 10 $0.0726
    • 100 $0.0682
    • 1000 $0.0617
    • 10000 $0.0617
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    TTI 74AUP2G17GM,115 Reel 5,000
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    Avnet Asia 74AUP2G17GM,115 6 Weeks 10,000
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    Avnet Silica 74AUP2G17GM,115 8 Weeks 5,000
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    EBV Elektronik 74AUP2G17GM,115 8 Weeks 5,000
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    NXP Semiconductors 74AUP2G17GM

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 6; Package Code: VSON; Package Shape: RECTANGULAR;
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    Vyrian 74AUP2G17GM 425
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    NXP Semiconductors 74AUP2G17GM-G

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 6; Package Code: SON; Package Shape: RECTANGULAR;
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    Vyrian 74AUP2G17GM-G 167
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    NXP Semiconductors 74AUP2G17GM-H

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 6; Package Code: SON; Package Shape: RECTANGULAR;
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    Vyrian 74AUP2G17GM-H 139
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    74AUP2G17GM Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G17GM NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GM NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GM,115 NXP Semiconductors Low-power dual Schmitt trigger; Package: SOT886 (XSON6); Container: Tape reel smd Original PDF
    74AUP2G17GM,115 NXP Semiconductors 74AUP2G17 - IC AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6, Gate Original PDF
    74AUP2G17GM,132 NXP Semiconductors Low-power dual Schmitt trigger; Package: SOT886 (XSON6); Container: Tape reel smd Original PDF
    74AUP2G17GM,132 NXP Semiconductors 74AUP2G17 - IC AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6, Gate Original PDF
    74AUP2G17GM-H NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GM-H NXP Semiconductors 74AUP2G17GM - Low-power dual Schmitt trigger Original PDF

    74AUP2G17GM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 5 — 5 December 2011 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original
    74AUP2G17 74AUP2G17 PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 4 — 3 November 2010 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original
    74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 6 — 4 December 2012 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original
    74AUP2G17 74AUP2G17 PDF

    marking code pv

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 01 — 7 November 2006 Product data sheet 1. General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire


    Original
    74AUP2G17 74AUP2G17 marking code pv PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 5 — 5 December 2011 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original
    74AUP2G17 74AUP2G17 PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 03 — 6 July 2009 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original
    74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 02 — 10 January 2008 Product data sheet 1. General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire


    Original
    74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E PDF