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    74AUP2G17GW Search Results

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    74AUP2G17GW Price and Stock

    Nexperia 74AUP2G17GW,125

    IC BUF NON-INVERT 3.6V 6TSSOP
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    DigiKey 74AUP2G17GW,125 Cut Tape 31 1
    • 1 $0.22
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    74AUP2G17GW,125 Digi-Reel 31 1
    • 1 $0.22
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    • 100 $0.1106
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    74AUP2G17GW,125 Reel 3,000
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    Avnet Americas 74AUP2G17GW,125 Reel 6,000 6 Weeks 3,000
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    Mouser Electronics 74AUP2G17GW,125 3,141
    • 1 $0.22
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    • 100 $0.097
    • 1000 $0.091
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    Verical 74AUP2G17GW,125 6,000 3,000
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    74AUP2G17GW,125 3,365 1,269
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    74AUP2G17GW,125 2,800 342
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    Arrow Electronics 74AUP2G17GW,125 6,000 6 Weeks 3,000
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    74AUP2G17GW,125 Cut Strips 3,365 6 Weeks 1,269
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    Newark 74AUP2G17GW,125 Cut Tape 3,275 5
    • 1 $0.354
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    • 100 $0.145
    • 1000 $0.11
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    74AUP2G17GW,125 Reel 3,000
    • 1 $0.272
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    TME 74AUP2G17GW,125 1
    • 1 $0.343
    • 10 $0.265
    • 100 $0.152
    • 1000 $0.098
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    Avnet Asia 74AUP2G17GW,125 48,000 6 Weeks 12,000
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    Avnet Silica 74AUP2G17GW,125 9,000 8 Weeks 3,000
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    Chip One Stop 74AUP2G17GW,125 Cut Tape 2,800
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    EBV Elektronik 74AUP2G17GW,125 8 Weeks 3,000
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    NXP Semiconductors 74AUP2G17GW-G

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: GULL WING; No. of Terminals: 6; Package Code: TSSOP; Package Shape: RECTANGULAR;
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    Vyrian 74AUP2G17GW-G 392
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    Nexperia 74AUP2G17GW

    BUFFER; Temperature Grade: AUTOMOTIVE; Terminal Form: GULL WING; No. of Terminals: 6; Package Code: TSSOP; Package Shape: RECTANGULAR;
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    Vyrian 74AUP2G17GW 172
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    74AUP2G17GW Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G17GW NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GW NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GW,125 NXP Semiconductors Low-power dual Schmitt trigger; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse Original PDF
    74AUP2G17GW,125 NXP Semiconductors 74AUP2G17 - IC AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, GREEN, PLASTIC, SC-88, SOT-363, SMT-6 PIN, Gate Original PDF
    74AUP2G17GW-G NXP Semiconductors Low-power dual Schmitt trigger Original PDF
    74AUP2G17GW-G NXP Semiconductors 74AUP2G17 - IC AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, GREEN, PLASTIC, SC-88, SOT-363, SMT-6 PIN, Gate Original PDF

    74AUP2G17GW Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 5 — 5 December 2011 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		74AUP2G17 74AUP2G17 PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 4 — 3 November 2010 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 6 — 4 December 2012 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		74AUP2G17 74AUP2G17 PDF

    marking code pv

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 01 — 7 November 2006 Product data sheet 1. General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire


    Original     		74AUP2G17 74AUP2G17 marking code pv PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 5 — 5 December 2011 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		74AUP2G17 74AUP2G17 PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 03 — 6 July 2009 Product data sheet 1. General description The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E PDF

    74AUP2G17

    Abstract: 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E
    Text: 74AUP2G17 Low-power dual Schmitt trigger Rev. 02 — 10 January 2008 Product data sheet 1. General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire


    Original     		74AUP2G17 74AUP2G17 74AUP2G17GF 74AUP2G17GM 74AUP2G17GW JESD22-A114E PDF