74LS125 Search Results

ls125a

Abstract: ls126A 74LS126A 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS125A SN54/74LS126A QUAD 3-STATE BUFFERS VCC E D O E D O 14 13 12 11 10 9 8 QUAD 3-STATE BUFFERS LOW POWER SCHOTTKY 1 2 3 E D O 4 5 6 7 E D O GND LS125A J SUFFIX CERAMIC CASE 632-08 VCC E D O E D O 14 13 12 11 10 9 8 14 1 N SUFFIX PLASTIC CASE 646-06

DN74LS125A

Abstract: MA161
Contextual Info: I LS TTL DN74LS Series 74LS125A 74LS125A Quad Bus Buffer Gates with 3 -sta te Outputs • Description P-1 DN 74LS125A contains four 3-state o u tp u t b uffer gate circuits, each w ith independent o u tp u t-co n tro l input-C term inals. ■ Features

Contextual Info: LS TTL DN74LS Series 74LS125A 74LS125A > IS a s A Quad Bus Buffer Gates with 3 -sta te Outputs • Description P-1 D N 74LS125A c o n ta in s c irc u its , each te rm in a ls. w ith f o u r 3 -sta te in d e p e n d e n t o u tp u t b u ff e r gate o u tp u t- c o n tr o l

LS126A

Contextual Info: g MOTOROLA SN54LS/74LS125A SN54LS/74LS126A TRUTH TABLES L S 125A INPUTS LS126A INPUTS E H L H H X L O UTPUT T D L L L H H H X (Z) L OUTPUT L H (2) Q UAD 3-STATE BUFFERS LOW POWER SCHOTTKY L ” LOW Voltage Level H - H IG H V oltage Level X “ D o n 't Care

74LS125APC

Abstract: 74LS125AP 74LS125AFC
Contextual Info: ! NATIONAL SENICOND {LOGIC} D5E D I t.SG1125 00^3003 □ I T -m s- ¿5 .fé CO NN ECTIO N DIAGRAM PINOUT A 54/74125 54LS/74LS125A QUAD BUS BUFFER GATE With 3-State Outputs ORDERING CODE: See Section 9 PIN PKGS COM MERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%,

Contextual Info: GD54/74LS125A QUADRUPLE BUS BUFFER GATES W ITH 3-STATE OUTPUTS Description This device contains 4 buffers with 3-state out­ puts and is provided with an output control input C which is independent for each buffer. Pin Configuration Vcc 4C 4A 4Y 3C 3A 3Y 14

74LS125APC

Abstract: 74LS125AP 74125 74LS125ADC 54*125 54125DM 54125FM 54LS125ADM 54LS125AFM 74125DC
Contextual Info: 125 C O N N E C T IO N D IA G R A M P IN O U T A 54/74125 Z>15 'V54LS/74LS125A QUAD BUS BUFFER GATE With 3-S ta te Outputs O R D E R IN G C O D E: See S e c tio n 9 PIN PKG S OUT C O M M E R C IA L G RADE M ILITA R Y G RADE V c c = +5.0 V ±5%, T a = 0 ° C to + 7 0 “ C

CI 7408

Abstract: CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L - T T L D65 54/7413, 54LS/74LS13 Vcc NC R R R fü| FÖI f71 r«l D66 54/74125, 54LS/74LS125 D67 54/74126, 54LS/74LS126 Vcc Vcc äJ QND E D68 54LS/74LS365 j y E D O 3X 5 rn m D O E D D O E D O IPTJ? ~ ? f i r

74LS125A

Abstract: LS125A
Contextual Info: M O TO R O LA &> SN54/74LS125A SN54/74LS126A TRUTH TABLES LS125A INPUTS Î D L L L H H X LS126A IN P U T S E D H L H H L X OUTPUT L H I2I O UTPUT L H IZI QUAD 3-STATE BUFFERS LO W PO W ER SC H O T T K Y L “ LOW Voltage Level H « HIGH Voltage Level X * Don't Care

LS126A

Abstract: LS125A ttl 493 LSI25A
Contextual Info: MOTOROLA SN54LS/74LS125A SN54LS/74LS126A TRU TH TABLES LS125A INPUTS LS126A IN P U T S E H L H H L X O UTP UT E D L L L L H H H X 21 OUTPUT L H (2 QUAD 3-STATE BUFFERS LOW POW ER S C H O TTK Y L 31 LOW Voltage Level H = H IG H V oltage Level X * D o n 't Care

74ls gate symbols

Abstract: TTL 74ls125 74125 ic 74LS125 74125 logic diagram 74LS series logic gate symbols 74125 TTL 74ls126 74LS366 TTL 74126
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D65 54/7413, 54LS/74LS13 Vcc NC R R R fü| FÖI f71 r«l D66 54/74125, 54LS/74LS125 D67 54/74126, 54LS/74LS126 Vcc Vcc EEp ^ ] III III liJ Lil 111 Lil 111 QND y y O E D O rn m E D O E D O R R R R Fol R |7|

TTL 74125

Abstract: TTL 74126 pin configuration of 74125 pin configuration of 74126 ls125a 74126 S0324 74125 N74126N 74LS
Contextual Info: Signelics 74125, 74126, LS125A, LS126A Buffers Quad 3-State Buffer Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 74125 10ns 32mA 74LS125A 8ns 11mA 74126 10ns 36mA 74LS126A 9ns 12mA TYPE FUNCTION TABLE 125, 'LS125A

74LS125

Abstract: 54LS 74LS
Contextual Info: GD54/74LS125A QUADRUPLE BUS BUFFER GATES W ITH 3-STATE OUTPUTS Description Pin Configuration This device contains 4 buffers with 3 -s ta te o ut­ puts and is provided with an output control input C which is independent for each buffer. Vcc 4C 4A 4Y 1C 1A

LS125A

Abstract: 74LS125A LS126A
Contextual Info: g MOTOROLA. SN54/74LS125A S N54/74LS 126 A QUAD 3-STATE BUFFERS VCC E D O E D [ ill [ ïïl fïïl pT] N O m y M QUAD 3-STATE BUFFERS i;? : LOW POWER SCHOTTKY ? n ^ i LiJ LU LU LU LU LU Ld E D E D GND LS125A Vc c E D (171 fïâl fîâl M J SUFFIX CERAMIC

74LS125APC

Contextual Info: 125 CO NNECTIO N DIAGRAM PINOUT A 54/74125 c, f 0 <5<4 >v54LS/74LS125A ^ Q U A D BUS BUFFER G A TE (W ith 3 -S ta te O u tp u ts ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE V cc = +5.0 V ±5%, T a = 0 °C to +70° C V cc = +5.0 V ±10%,

TTL 74125

Abstract: pin configuration of 74125 TTL 74126 74126 pin configuration of 74126 74LS125A ln74 74126 pin configuration N74LS1
Contextual Info: 74125, 74126, LS125A, LS126A Signetics Buffers Quad 3-State Buffer Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 74125 10ns 32mA 74LS125A 8ns 11mA 74126 10ns 36mA 74LS126A 9ns 12mA TYPE FUNCTION TABLE '125, LS125A

Contextual Info: GD54/74LS125A QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS Description Pin Configuration This device contains 4 buffers with 3-state out­ puts and is provided with an output control input C which is independent for each buffer. Vcc 4C 4A 4Y 3Ç 3A 3Y 14

ls125a

Abstract: 751A-02 LS126A SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74ls125a
Contextual Info: SN54/74LS125A SN54/74LS126A QUAD 3-STATE BUFFERS VCC E D O E D O 14 13 12 11 10 9 8 QUAD 3-STATE BUFFERS LOW POWER SCHOTTKY 1 2 3 4 5 6 7 E D O E D O GND LS125A VCC E D O E D O 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 N SUFFIX PLASTIC CASE 646-06

74HC125A

Abstract: TC74HC125AFN
Contextual Info: TOSHIBA TC 74H C 125A P /A F/A FN ,126A P /A F TO SHIBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC125AP, TC74HC125AF, TC74HC125AFN TC74HC126AP, TC74HC126AF TC74HC125AP/AF/AFN TC74HC126AP/AF QUAD BUS BUFFER QUAD BUS BUFFER Note The JEDEC SOP (FN) is not available in

14 pin LCD monocrome connector

Abstract: lcd ramdac capacitor bc series 10uf/63V toshiba lcd power board schematic LCD dots toshiba 320X240 LP29 CORE SED1354F hitachi lcd backlight schematic lcd 240 128 ts SED1354
Contextual Info: MF1072-02 ll er s o r e t ri n 54 13 ED Do a M t cs i h p a r S trix G o e C S D LC c Te c i hn a M al l a nu NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.

Contextual Info: -/ TC74HC125AP/AF/AFN / TC74HC126AP/AF TC74HC125AP/AF/AFN QUAD BUS B UFFER TC74HC126AP/AF QUAD BUS B U FFER T h e T C 7 4 H C 1 2 5 A / 1 2 6 A a r e h ig h sp eed C M O S Q U A D B U S B U F F ' E R s fa b r ic a t e d w it h s ilic o n g a te C - M O S te c h n o lo g y .

Contextual Info: TC74HC125AP/AF/AFN,126AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC125AP,TC74HC125AF,TC74HC125AFN TC74HC126AP,TC74HC126AF TC74HC125AP/AF/AFN Quad Bus Buffer TC74HC126AP/AF Quad Bus Buffer Note: xxxFN JEDEC SOP is not available in

Contextual Info: The SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied. D D D SN54125, SN54126, SN54LS125A, SN54LS126A, SN74125, SN74126, 74LS125A, SN74LS126A QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS Quad Bus Buffers 3-State Outputs

82C452

Abstract: P82C452 82C452A crt controller 6845 MCA Bus 8bit vga controller plasma 640x480 64kx4 DRAM LM339 XR31
Contextual Info: 82C452 Super VGA Graphics Controller Data Sheet September 1991 P R E L I M I N A R Y Copyright Notice Copyright 1990, Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce,