81c78
Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Text: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M
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Original
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2147-35C
2147-45C
2147-45M+
2147-55C
2147-55M
2148-35C
2148-35M
2148-45C
81c78
7C291
5962-8515505RX
27PC256-12
PAL164A
8464C
5C6408
72018
39C10B
MACH110 cross reference
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PDF
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programmer manual EPLD cypress
Abstract: pASIC380 programming manual EPLD CY7C383A GAL programmer schematic
Text: filename: Tuesday, August 11, 1992 Revision: October 9, 1995 pASIC380 Family UltraLogict Very High Speed CMOS FPGAs D Robust routing resources Features D Very high speed D D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies
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Original
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pASIC380
16bit
programmer manual EPLD cypress
pASIC380
programming manual EPLD
CY7C383A
GAL programmer schematic
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PDF
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CY7C381P-2JC
Abstract: CY7C381P-2JI vial
Text: 7C381A: Monday, September 20, 1993 Revision: October 9, 1995 CY7C381P 7C382P UltraLogict Very High Speed 1K Gate CMOS FPGA Features D Very high speed D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies
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Original
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7C381A:
CY7C381P
CY7C382P
68pin
69pin
100pin
CY7C381P-2JC
CY7C381P-2JI
vial
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PDF
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CY7C381P
Abstract: CY7C381P-0JC CY7C381P-XJC CY7C381P-XJI CY7C382P CY7C383A CY7C385P 100-Pin CPGA Package Pin-Out Diagram
Text: CY7C381P 7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,
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OCR Scan
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CY7C381P
CY7C382P
68-pin
69-pin
100-pin
16-bit
CY7C382Pâ
Y7C382Pâ
68-Lead
CY7C381P-0JC
CY7C381P-XJC
CY7C381P-XJI
CY7C382P
CY7C383A
CY7C385P
100-Pin CPGA Package Pin-Out Diagram
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C381P 7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,
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OCR Scan
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CY7C381P
CY7C382P
68-pin
69-pin
100-pin
16-bit
68-Lead
CY7C382P-XGM
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PDF
|
382P
Abstract: No abstract text available
Text: CY7C381P 7C382P W CYPRESS Features • UltraLogic Very High Speed IK Gate CMOS FPGA Functional Description — Fast, fu lly a u to m a tic p la ce and rou te Very high speed — W aveform sim u la tio n w ith back a n n otated net d elays — L oad ab le cou n ter freq u en cies
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OCR Scan
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100-pin
7C382P
382P
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PDF
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Untitled
Abstract: No abstract text available
Text: > CYPRESS Features • Full 33V operation • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-8-chip operating frequencies up to 85 MHz — Input + logic cell + output delays under 7 ns • Unparalleled FPGA performance for counters, data path, state machines,
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OCR Scan
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208-pin
352-pin
16-bit
SIC380
pASIC380,
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PDF
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