AO4L
Abstract: ld3p AO15A AO16A FD3S AO15AN AO23L BT8C datasheet MTC-35400 mux2*1
Text: MTC-35000 CMOS 0.5µ Standard Cell Library Services October ‘98 CMOS Family Features • Technology - 0.5µ CMOS for mixed analog 2 digital application - 0.5 micron CMOS transistors, triple layer metal, single or doble poly layer - Self-aligned twin tub Nand P-wells
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MTC-35000
102ps
216ps
AO4L
ld3p
AO15A
AO16A
FD3S
AO15AN
AO23L
BT8C datasheet
MTC-35400
mux2*1
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4342414
Abstract: AS7C34098 AS7C4098
Text: March 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
4342414
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AS7C34098
Abstract: AS7C4098 cmos4098
Text: May 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
48-ball
cmos4098
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cmos 4098
Abstract: No abstract text available
Text: AS7C4098 AS7C34098 September 2001 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
48-ball
cmos 4098
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AS7C34098
Abstract: AS7C4098
Text: January 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
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AS7C4098-20JC
Abstract: 4342414
Text: August 2000 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
AS7C34098-10JC
AS7C4098-20JC
4342414
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AS7C34098
Abstract: AS7C4098
Text: June 2000 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature
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AS7C4098
AS7C34098
AS7C4098
AS7C34098
44-pin
400-mil
AS7C34098-15JI
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DIN527
Abstract: TH58NS100DC
Text: TH58NS100DC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 TM 1-GBIT 128M x 8 BITS CMOS NAND E PROM (128M BYTE SmartMedia ) DESCRIPTION The TH58NS100 is a single 3.3-V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable
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TH58NS100DC
TH58NS100
528-byte
528-byte
DIN527
TH58NS100DC
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Untitled
Abstract: No abstract text available
Text: TH58NS100DC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 1-GBIT 128M x 8 BITS CMOS NAND E PROM (128M BYTE SmartMedia TM ) DESCRIPTION The TH58NS100 is a single 3.3-V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable
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TH58NS100DC
TH58NS100
528-byte
528-byte
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7C34098-20
Abstract: AS7C34098 AS7C4098
Text: High Performance 256Kx16 CMOS SRAM AS7C4098 AS7C34098 256K×16 CMOS SRAM Preliminary information Features • Organization: 262,144 words × 16 bits • High speed - 15/20/25/35 ns address access time - 8/10/12/15 ns output enable access time • Low power consumption
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AS7C4098
AS7C34098
44-pin
7C34098-20
AS7C34098
AS7C4098
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AS7C31026
Abstract: AS7C34098 AS7C3513 AS7C4098 7c34098-12
Text: AS7C4098 AS7C34098 5V/3.3V 256Kx16 CMOS SRAM Features • Easy memory expansion with CE, OE inputs • TTL- and CMOS-compatible, three-state I/ • 44-pin JEDEC standard packages - 400 mil SOJ - 400 mil TSOP II • Center power and ground pins for low noise
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AS7C4098
AS7C34098
44-pin
AS7C3513)
AS7C31026)
AS7C3128K16)
A17C4098-15TI
AS7C4098-20TI
AS7C4098-25TI
AS7C34098-12TI
AS7C31026
AS7C34098
AS7C3513
AS7C4098
7c34098-12
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hcf 4052 datasheet
Abstract: 4536b 74 HC 273A 4026B data sheet 4013B applications 4046b 4039B 40106B C3245 40147B
Text: CMOSultbis 28-06-2001 17:44 Pagina 1 The complete CMOS Logic Source Standard Logic Selection Guide CMOSultbis 28-06-2001 17:44 Pagina 2 FUNCTION SELECTOR HC/HCT,AC/ACT,VHC/VHCT, LCX,LVQ,LVX,VCX, LVC,V2G,V2T, V1G,V1T STANDARD CODE FUNCTION GATE BUFFER CMOS 4000B STANDARD CODE
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4000B
4011B,
4012B,
4023B,
4068B,
40107B
4000B,
4001B,
4002B,
4025B
hcf 4052 datasheet
4536b
74 HC 273A
4026B data sheet
4013B
applications 4046b
4039B
40106B
C3245
40147B
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74573
Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Text: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and CMOS chips that are readily available over the counter from such places as Maplin Electronics in the UK . Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together.
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Untitled
Abstract: No abstract text available
Text: TH58NVG5S0FTA20 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 32 GBIT 4G x 8 BIT CMOS NAND E PROM DESCRIPTION The TH58NVG5S0F is a single 3.3V 32 Gbit (36,305,895,424 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 232) bytes × 64 pages × 16384 blocks.
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TH58NVG5S0FTA20
TH58NVG5S0F
4328-byte
2011-07-01C
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TH58NVG*D
Abstract: No abstract text available
Text: TH58NVG4S0FBAID TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 16 GBIT 2G x 8 BIT CMOS NAND E PROM DESCRIPTION The TH58NVG4S0FBAID is a single 3.3V 16 Gbit (18,152,947,712 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 232) bytes × 64 pages × 8192 blocks.
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TH58NVG4S0FBAID
TH58NVG4S0FBAID
4328-byte
2013-01-31C
TH58NVG*D
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TH58NVG5S0FTAK0
Abstract: No abstract text available
Text: TH58NVG5S0FTAK0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 32 GBIT 4G x 8 BIT CMOS NAND E PROM DESCRIPTION The TH58NVG5S0F is a single 3.3V 32 Gbit (36,305,895,424 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 232) bytes × 64 pages × 16384 blocks.
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TH58NVG5S0FTAK0
TH58NVG5S0F
4328-byte
2011-07-01C
TH58NVG5S0FTAK0
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Untitled
Abstract: No abstract text available
Text: TOSHIBA CONFIDENTIAL TENTATIVE TH58NVG5S0FTA20 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 32 GBIT 4G x 8 BIT CMOS NAND E PROM DESCRIPTION The TH58NVG5S0F is a single 3.3V 32 Gbit (36,305,895,424 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 232) bytes × 64 pages × 16384 blocks.
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TH58NVG5S0FTA20
TH58NVG5S0F
4328-byte
2010-12-13C
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TH58100FT
Abstract: DIN527
Text: TH58100FT TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 1-GBIT 128M x 8 BITS CMOS NAND E PROM DESCRIPTION The TH58100 is a single 3.3 V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 8192 blocks. The device has a 528-byte
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TH58100FT
TH58100
528-byte
528-byte
TH58100FT
DIN527
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DIN 4102
Abstract: TH58100FT working and block diagram of ups DIN527
Text: TH58100FT TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 1-GBIT 128M ´ 8 BITS CMOS NAND E PROM DESCRIPTION The TH58100 is a single 3.3 V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes ´ 32 pages ´ 8192 blocks. The device has a 528-byte
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TH58100FT
TH58100
528-byte
528-byte
DIN 4102
TH58100FT
working and block diagram of ups
DIN527
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LR40981A
Abstract: LR40981 pulse dialer phones
Text: Pulse Dialer CM OS LSI LR 40981A LR40981A • Pulse Dialer CMOS LSI Pin Connections Description T h e LR40981A is a CMOS LSI for pulse dialer with redial which integrates a ceram ic reso n ato r as a frequency reference. V dd | T V REF [j[ CO L , T ■ Features
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0981A
LR40981A
LR40981A
17-digit
16-pin
480kH¡
2N5550
2N5401
2N6661
LR40981
pulse dialer phones
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7507C
Abstract: transistor equivalent for 2N5401 "Constant Current diode"
Text: SHARP E L E K / MELEC 1SE O I D IV fllö G T T fl 0 0 G 1 2 7 A Pulse Dialer CMOS LSI LR40982 • LR40982 T-75 -07-07 Pulse Dialer CMOS LSI Pin Connections Description The LR40982 is a CMOS LSI for pulse dialer with redial which integrates a ceramic resonator as a fre
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lr40982
T-75-07-07
17-digit
16-pin
LR40982
f800msÂ
T-75-07-Ã
2N5550
7507C
transistor equivalent for 2N5401
"Constant Current diode"
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LR40981A
Abstract: telephone keyboard schematic schematic diagram for ac power line voltage con
Text: SHARP E L E K / M ELEC is e D IV d | aiaov^a 7S b | L R 40981A a o a ia Pulse Dialer CM O S LSI LR40981A ~0 7 - 0 ~ ¡ Pulse Dialer CMOS LSI P in C o n n e c t i o n s D e s c r ip t i o n The LR40981A is a CMOS LSI for pulse dialer with redial which integrates a ceramic resonator as a
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LR40981A
17-digit
16-pin
-800ms-
800msÂ
G001277
T-75-07-07
telephone keyboard schematic
schematic diagram for ac power line voltage con
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Untitled
Abstract: No abstract text available
Text: H igh Performanc e 25ÓKX16 CMOS SRAM AS7C.4098 AS7C34098 2 5 6 K X 1 6 CMOS SRAM Preliminary information Features • O r g a n iz a tio n : 2 6 2 ,1 4 4 w o r d s x 16 b its 1E asy m e m o r y e x p a n s i o n w i t h C E, O E in p u ts • H ig h sp e e d
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AS7C34098
S7C4098-20JC
AS7C34098-20JC
4098-25JC
4098-35JC
S7C34098-25JC
AS7C34098-3SJC
AS7C4r098
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2N555
Abstract: No abstract text available
Text: LR40982 Pulse Dialer C M O S LSI LR40982 • Pulse Dialer CMOS LSI Pin Connections Description T he LR40982 is a CMOS LSI for pulse dialer with rediaJ which in tegrates a ceram ic reso n ato r as a fre quency reference. Vdd E ■ VR E F H COLi T COLz [T
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LR40982
LR40982
17-digit
16-pin
480kHz
2N3822
1N914
2N555
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