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    Nichicon Corporation UCY2D181MHD3TN

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    Nichicon Corporation UCY2D101MHD1TO

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    Nichicon Corporation UCY2D471MHD

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    Nichicon Corporation UCY2D220MPD

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    Nichicon Corporation UCY2D390MPD

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    CY2D Datasheets (112)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY2DL1504ZXC Cypress Semiconductor Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC CLK BUFFER 2:4 1.5GHZ 20TSSOP Original PDF
    CY2DL1504ZXI Cypress Semiconductor Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC CLK BUFFER 2:4 1.5GHZ 20TSSOP Original PDF
    CY2DL1510AZC Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC CLK BUFFER 1:10 1.5GHZ 32TQFP Original PDF
    CY2DL1510AZCT Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC CLK BUFFER 1:10 1.5GHZ 32TQFP Original PDF
    CY2DL1510AZI Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC CLK BUFFER 1:10 1.5GHZ 32TQFP Original PDF
    CY2DL1510AZIT Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC CLK BUFFER 1:10 1.5GHZ 32TQFP Original PDF
    CY2DL15110AZI Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC BUFF MUX 2:10 1.5GHZ 32TQFP Original PDF
    CY2DL15110AZIT Cypress Semiconductor Integrated Circuits (ICs) - Clock/Timing - Clock Buffers, Drivers - IC BUFF MUX 2:10 1.5GHZ 32TQFP Original PDF
    CY2DL814 Cypress Semiconductor Low-voltage operation Original PDF
    CY2DL814AT Cypress Semiconductor 1:4 Clock Fanout Buffer Original PDF
    CY2DL814AY Cypress Semiconductor 1:4 Clock Fanout Buffer Original PDF
    CY2DL814SC Cypress Semiconductor Low-voltage operation Original PDF
    CY2DL814SCT Cypress Semiconductor IC FANOUT BUFFER SINGL Original PDF
    CY2DL814SI Cypress Semiconductor Low-voltage operation Original PDF
    CY2DL814SIT Cypress Semiconductor IC FANOUT BUFFER SINGL Original PDF
    CY2DL814SXC Cypress Semiconductor IC FANOUT BUFFER S Original PDF
    CY2DL814SXCT Cypress Semiconductor IC FANOUT BUFFER SINGL Original PDF
    CY2DL814SXI Cypress Semiconductor Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC CLK BUFFER 1:4 400MHZ 16SOIC Original PDF
    CY2DL814SXIT Cypress Semiconductor IC FANOUT BUFFER SINGL Original PDF
    CY2DL814ZC Cypress Semiconductor Low-voltage operation Original PDF

    CY2D Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY2DP814 1:4 Clock Fanout Buffer Features Description • Low-voltage operation The Cypress CY2 series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. ■ VDD = 3.3V ■ 1:4 fanout ■


    Original     		PDF CY2DP814 35-micron CY2DP814

    CY2DL814

    Abstract: CY2DL814SC CY2DL814SCT CY2DL814SI CY2DL814SIT CY2DL814ZC CY2DL814ZCT CY2DL814ZI CY2DL814ZIT
    Text: ComLink Series CY2DL814 1:4 Clock Fanout Buffer Features • • • • • • • • Low-voltage operation VDD = 3.3V 1:4 Fanout Single-input configurable for — LVDS, LVPECL, or LVTTL The Cypress CY2 series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the


    Original     		PDF CY2DL814 35-micron CY2DL814 100-ohm CY2DL814SC CY2DL814SCT CY2DL814SI CY2DL814SIT CY2DL814ZC CY2DL814ZCT CY2DL814ZI CY2DL814ZIT

    Untitled

    Abstract: No abstract text available
    Text: CY2DP1510 1:10 LVPECL Fanout Buffer with Selectable Clock Input 1:10 LVPECL Fanout Buffer with Selectable Clock Input Features • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to 10 LVPECL output pairs ■ Translates any single-ended input signal to 3.3 V LVPECL


    Original     		PDF CY2DP1510 40-ps 600-ps 11-ps 12-kHz 20-MHz 32-pin

    Untitled

    Abstract: No abstract text available
    Text: CY2DL15110 1:10 Differential LVDS Fanout Buffer with Selectable Clock Input 1:10 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two low-voltage differential signal LVDS input pairs to distribute to 10 LVDS output pairs


    Original     		PDF CY2DL15110 40-ps 600-ps 11-ps 12-kHz 20-MHz 32-pin CY2DL15110

    Untitled

    Abstract: No abstract text available
    Text: ComLink Series CY2DP3110 PRELIMINARY 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or LVCMOS/LVTTL single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical


    Original     		PDF CY2DP3110 35-ps 100-ps 10-pS 400-ps 32-pin MC100 CY2DP3110

    Untitled

    Abstract: No abstract text available
    Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical


    Original     		PDF CY2DP3110 35-ps 100-ps 400-ps 32-pin MC100 CY2DP3110

    Untitled

    Abstract: No abstract text available
    Text: CY2DM1502 1:2 CML / LVPECL Input to CML Output Fanout Buffer Features Functional Description • One current mode logic CML or low-voltage positive emitter-coupled logic (LVPECL) input pair distributed to two CML output pairs ■ 20-ps maximum output-to-output skew


    Original     		PDF CY2DM1502 20-ps 480-ps CY2DM1502 15-ps

    Input voltage 40V Output voltage 13.8V

    Abstract: JEDEC SPEC MS - 034 JESD78B
    Text: CY2DP1510 1:10 LVPECL Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two low-voltage positive emitter-coupled logic LVPECL input pairs to distribute to 10 LVPECL output pairs ■ 40-ps maximum output-to-output skew


    Original     		PDF CY2DP1510 40-ps 600-ps 11-ps 12-kHz 20-MHz CY2DP1510 Input voltage 40V Output voltage 13.8V JEDEC SPEC MS - 034 JESD78B

    Untitled

    Abstract: No abstract text available
    Text: ComLink Series CY2DL814 1:4 Clock Fanout Buffer 1:4 Clock Fanout Buffer Functional Description Features The Cypress CY2 series of network circuits is produced using advanced 0.35 micron CMOS technology, achieving the industry’s fastest logic. • Low-voltage operation


    Original     		PDF CY2DL814 CY2DL814

    Untitled

    Abstract: No abstract text available
    Text: CY2DP818 1:8 Clock Fanout Buffer 1:8 Clock Fanout Buffer Description Features The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. • Low-voltage operation VDD = 3.3 V ■ 1:8 fanout


    Original     		PDF CY2DP818 CY2DP818 38-pin

    Untitled

    Abstract: No abstract text available
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew


    Original     		PDF CY2DL1504 CY2DL1504

    CY2DP814

    Abstract: CY2DP814SC CY2DP814SCT CY2DP814SI CY2DP814SIT CY2DP814ZC CY2DP814ZCT CY2DP814ZI CY2DP814ZIT
    Text: ComLink Series CY2DP814 1:4 Clock Fanout Buffer Features Description • • • • • • • • • Low voltage operation VDD = 3.3V 1:4 fanout Single-input configurable for LVDS, LVPECL, or LVTTL Four differential pairs of LVPECL outputs Drives 50-ohm load


    Original     		PDF CY2DP814 50-ohm 35-micron CY2DP814 CY2DP814SC CY2DP814SCT CY2DP814SI CY2DP814SIT CY2DP814ZC CY2DP814ZCT CY2DP814ZI CY2DP814ZIT

    Q10A

    Abstract: DD 127 D DL8520 CY2DL8520 Q11A Q13A 39 pin lvds converter q19b Q16b Q16A
    Text: ADVANCED CY2DL8520 20 Bit Buffer/ Converter w/ Output Enable s ComL TM SERIES Product Features Product Features ( Cont.) • VDD range from 2.5 to 3.3V • • 20 input’s configurable for LVPECL/ LVTTL/LVCMOS 20 pairs LVDS output Drives 50/100 ohm load


    Original     		PDF CY2DL8520 400MHz LPQFP-176 MS-026 Q10A DD 127 D DL8520 CY2DL8520 Q11A Q13A 39 pin lvds converter q19b Q16b Q16A

    CY2DP818

    Abstract: No abstract text available
    Text: ADVANCED CY2DP818 1:8 Clock Fanout Buffer TM ComL SERIES Product Features Product Description • This CYPRESS series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industries fastest logic. • • • • • 1:8 Fanout


    Original     		PDF CY2DP818 35-micron 400MHz CY2DP818

    Untitled

    Abstract: No abstract text available
    Text: FastEdge Series CY2DP314 PRELIMINARY 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The


    Original     		PDF CY2DP314 50-ps 100-ps 500-ps 20-pin CY2DP314

    Untitled

    Abstract: No abstract text available
    Text: CY2DP814 1:4 Clock Fanout Buffer Features Description • Low-voltage operation The Cypress CY2 series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. ■ VDD = 3.3V ■ 1:4 fanout ■


    Original     		PDF CY2DP814 35-micron CY2DP814

    CY2DP314

    Abstract: CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314
    Text: CY2DP314 1:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable


    Original     		PDF CY2DP314 CY2DP314 CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314

    Untitled

    Abstract: No abstract text available
    Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical


    Original     		PDF CY2DP3110 35-ps 100-ps 400-ps 32-pin MC100 CY2DP3110

    CY2DP3110

    Abstract: CY2DP3110AI CY2DP3110AIT CY2DP3110AXIT MC100ES6111
    Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features Functional Description • Ten ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)


    Original     		PDF CY2DP3110 32-pin CY2DP3110 CY2DP3110AI CY2DP3110AIT CY2DP3110AXIT MC100ES6111

    2DL15

    Abstract: 2DL-15 2VBQ
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew


    Original     		PDF CY2DL1504 30-ps 480-ps 11-ps 12-kHz 20-MHz 20-pin CY2DL1504 2DL15 2DL-15 2VBQ

    Untitled

    Abstract: No abstract text available
    Text: CY2DP818 1:8 Clock Fanout Buffer 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3 V The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ 1:8 fanout


    Original     		PDF CY2DP818 CY2DP818 to350

    CY2DP3110

    Abstract: CY2DP3110AI CY2DP3110AIT MC100ES6111
    Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features Functional Description • Ten ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)


    Original     		PDF CY2DP3110 32-pin CY2DP3110 CY2DP3110AI CY2DP3110AIT MC100ES6111

    CY2DP3120

    Abstract: CY2DP3120AI CY2DP3120AIT CY2DP3120AXI CY2DP3120AXIT MC100ES6221
    Text: FastEdge Series CY2DP3120 1:20 Differential Clock/Data Fanout Buffer Features Functional Description The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The


    Original     		PDF CY2DP3120 CY2DP3120 1-to-20 CY2DP3120AI CY2DP3120AIT CY2DP3120AXI CY2DP3120AXIT MC100ES6221

    p314v

    Abstract: No abstract text available
    Text: FastEdge Series CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)


    Original     		PDF CY2DP314 20-pin CY2DP314 p314v