Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    J67 PACKAGE Search Results

    J67 PACKAGE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    J67 PACKAGE Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    J67 Package Cypress Semiconductor Plastic Leaded Chip Carriers Original PDF

    J67 PACKAGE Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    85003

    Abstract: J64 Package
    Text: Package Diagram Plastic Leaded Chip Carriers 20-Lead Plastic Leaded Chip Carrier J61 51-85000-A 28-Lead Plastic Leaded Chip Carrier J64 51-85001-A 1 Package Diagram 32-Lead Plastic Leaded Chip Carrier J65 51-85002-B 44-Lead Plastic Leaded Chip Carrier J67


    Original
    20-Lead 1-85000-A 28-Lead 1-85001-A 32-Lead 51-85002-B 44-Lead 1-85003-A 52-Lead 1-85004-A 85003 J64 Package PDF

    52-Lead

    Abstract: 20 002 32-Lead carrier chip led J69 Package led circuit diagram led datasheets J64 Package
    Text: : Package Diagram Plastic Leaded Chip Carriers 20-Lead Plastic Leaded Chip Carrier J61 28-Lead Plastic Leaded Chip Carrier J64 1 : Package Diagram 32-Lead Plastic Leaded Chip Carrier J65 44-Lead Plastic Leaded Chip Carrier J67 2 : Package Diagram 52-Lead Plastic Leaded Chip Carrier J69


    Original
    20-Lead 28-Lead 32-Lead 44-Lead 52-Lead 68-Lead 84-Lead 20 002 carrier chip led J69 Package led circuit diagram led datasheets J64 Package PDF

    CY7C276-25JC

    Abstract: C276 CY7C276 CY7C276-25HC C2761 CY7C276-30JC c2762 C2767
    Text: 1CY 7C27 6 CY7C276 16K x 16 Reprogrammable PROM Features Functional Description • 0.8-micron CMOS for optimum speed/power The CY7C276 is a high-performance 16K-word by 16-bit CMOS PROM. It is available in a 44-pin PLCC/CLCC and a 44-pin LCC packages, and is 100% reprogrammable in windowed packages. The memory cells utilize proven EPROM


    Original
    CY7C276 CY7C276 16K-word 16-bit 44-pin 25-ns 16-bit-wide CY7C276-25JC C276 CY7C276-25HC C2761 CY7C276-30JC c2762 C2767 PDF

    J67 Package

    Abstract: No abstract text available
    Text: PRELIMINARY CY7C371i UltraLogict 32ĆMacrocell Flash CPLD Device CPLD and is part of the FLASH370it family of highĆdensity, highĆ speed CPLDs. Like all members of the FLASH370i family, the CY7C371i is deĆ signed to bring the ease of use and high performance of the 22V10, as well as PCI


    Original
    CY7C371i 32Macrocell FLASH370it FLASH370i CY7C371i 22V10, J67 Package PDF

    7C371-143

    Abstract: 7C371-83 7C371L-83 CY7C371 CY7C372 FLASH370 7C371-110
    Text: 7c371: Tuesday, May 26, 1992 Revision: August 9, 1995 CY7C371 UltraLogict 32ĆMacrocell Flash CPLD Features Functional Description D D D The CY7C371 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370 family of highĆdenĆ


    Original
    7c371: CY7C371 32Macrocell CY7C371 FLASH370 22V10 7C371-143 7C371-83 7C371L-83 CY7C372 7C371-110 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins


    Original
    CY7C371i 32-Macrocell 22V10, FLASH370i PDF

    ULTRA37000

    Abstract: No abstract text available
    Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C371i UltraLogic™ 32-Macrocell Flash CPLD Features • • • • • • • • • • • designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to


    Original
    ULTRA37000TM CY7C371i 32-Macrocell 22V10, 44-pin CY7C372i CY7C371i ULTRA37000 PDF

    ULTRA37000

    Abstract: No abstract text available
    Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C371i UltraLogic™ 32-Macrocell Flash CPLD Features • • • • • • • • • • • designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to


    Original
    ULTRA37000TM CY7C371i 32-Macrocell 22V10, 44-pin CY7C372i CY7C371i ULTRA37000 PDF

    cypress FLASH370

    Abstract: 7C371-110 7C371-143 7C371-83 CY7C371 CY7C372 FLASH370
    Text: CY7C371 UltraLogic 32-Macrocell Flash CPLD Features • • • • • • of use and high performance of the 22V10 to high-density CPLDs. 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins Bus Hold capabilities on all I/Os and dedicated inputs


    Original
    CY7C371 32-Macrocell 22V10 CY7C371 FLASH370 cypress FLASH370 7C371-110 7C371-143 7C371-83 CY7C372 PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6136 1CY 7C37 1i PRELIMINARY CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks


    Original
    CY7C371i 32-Macrocell 22V10, FLASH370i PDF

    CY7C343B

    Abstract: ULTRA37000TM
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C343B 64-Macrocell MAX EPLD Features Functional Description • 64 MAX macrocells in 4 LABs The CY7C343B is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages.


    Original
    ULTRA37000TM CY7C343B 64-Macrocell CY7C343B 44-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: 71i CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins


    Original
    CY7C371i 32-Macrocell 22V10, FLASH370i CY7C371i PDF

    CY7C343B

    Abstract: ULTRA37000TM
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C343B 64-Macrocell MAX EPLD Features Functional Description • 64 MAX macrocells in 4 LABs The CY7C343B is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages.


    Original
    ULTRA37000TM CY7C343B 64-Macrocell CY7C343B 44-pin PDF

    CY7C381P-2JC

    Abstract: CY7C381P-2JI vial
    Text: 7C381A: Monday, September 20, 1993 Revision: October 9, 1995 CY7C381P CY7C382P UltraLogict Very High Speed 1K Gate CMOS FPGA Features D Very high speed D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies


    Original
    7C381A: CY7C381P CY7C382P 68pin 69pin 100pin CY7C381P-2JC CY7C381P-2JI vial PDF

    LASH370

    Abstract: No abstract text available
    Text: fax id: 6136 CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks


    Original
    CY7C371i 32-Macrocell 22V10, LASH370i LASH370 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to


    Original
    CY7C372i 64-Macrocell FLASH370iTM FLASH370i CY7C372i 22V10, PDF

    Untitled

    Abstract: No abstract text available
    Text: p yp: v « *1 X X CY7C276 - 16Kx 16 Reprogrammable PROM Features Functional Description • The CY7C276 is a high-performance 16K-word by 16-bit CMOS PROM. It is available in a 44-pin PLCC/CLCC and a 44-pin LCC packages, and is 100% reprogrammable in w in­


    OCR Scan
    CY7C276 CY7C276 16K-word 16-bit 44-pin CY7C276, PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CYPRESS UltraLogic 32-Macrocell Flash CPLD Device CPLD and is part of the FLASH370i “ family of high-density, high­ speed CPLDs. Like all members of the FLASH370i family, the CY7C371i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI


    OCR Scan
    32-Macrocell FLASH370i FLASH370i CY7C371i 22V10, 001733b PDF

    C3816

    Abstract: No abstract text available
    Text: IIIWI IdlllW. IVIUMUdy, MUyU£>l I / , \ W £ Revision: Wednesday, March 16,1994 CY7C381 CY7C382 W CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays


    OCR Scan
    68-pin 16-bit 256Tbb2 C3816 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C381P CY7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,


    OCR Scan
    CY7C381P CY7C382P 68-pin 69-pin 100-pin 16-bit 68-Lead CY7C382P-XGM PDF

    l83A

    Abstract: No abstract text available
    Text: fax id: 6126 CY7C371 CYPRESS UltraLogic 32-Macrocell Flash CPLD FLASH370 fam ily the CY7C371 is designed to bring the ease of use and high performance of the 22V10 to high-density CPLDs. Features • 32 macrocells in two logic blocks • 32 I/O pins The 32 macrocells in the CY7C371 are divided between two


    OCR Scan
    CY7C371 32-Macrocell FLASH370 CY7C371 22V10 l83A PDF

    Untitled

    Abstract: No abstract text available
    Text: V CYPRESS CY7C371 UltraLogic 32-Macrocell Flash CPLD Features Functional Description • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • No hidden delays • High speed — Ímax = 143 MHz The CY7C371 is a Flash erasable Complex


    OCR Scan
    CY7C371 32-Macrocell CY7C371 22V10 PDF

    u2330

    Abstract: No abstract text available
    Text: fax id: 6126 CY7C371 p ro : V « *1 X X - UltraLogic 32-Macrocell Flash CPLD F lash 370 family, the CY7C371 is designed to bring the ease of use and high performance of the 22V10 to high-density CPLDs. Feat ures • 32 m acrocells in two logic blocks The 32 macrocells in the CY7C371 are divided between two


    OCR Scan
    44-pin CY7C371 32-Macrocell CY7C371 22V10 u2330 PDF

    frws 5-4

    Abstract: CY7C381-0JI C3816 G68 Package vhdl code for lte channel coding CY7C381 CY7C382 7c381 C381-9 C3812
    Text: ¡iiö i id in tJ . iv iu iiu c iy , M u y u t ji i / , Revision: Wednesday, March 16,1994 ¥ CY7C381 CY7C382 cypress Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays


    OCR Scan
    CY7C381 CY7C382 68-pin 16-bit frws 5-4 CY7C381-0JI C3816 G68 Package vhdl code for lte channel coding CY7C382 7c381 C381-9 C3812 PDF