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    SensiEDGE SIMNA-868

    Antennas Accessories kit External Antenna 868MHz. SMA connector
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    Chip1Stop SIMNA-868 5
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    MNA8 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AHC373

    Abstract: 74AHC373D 74AHC373PW 74AHC573 74AHCT373 74AHCT373D 74AHCT573 AHCT373
    Text: 74AHC373; 74AHCT373 Octal D-type transparant latch; 3-state Rev. 03 — 20 May 2008 Product data sheet 1. General description The 74AHC373; 74AHCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC373; 74AHCT373 74AHCT373 AHCT373 74AHC373 74AHC373D 74AHC373PW 74AHC573 74AHCT373D 74AHCT573

    74LV374

    Abstract: 74HC374 74HCT374 74LV374D 74LV374N DIP20 JESD22-A114E SO20 SSOP20
    Text: 74LV374 Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 02 — 14 May 2009 Product data sheet 1. General description The 74LV374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input CP and an output enable


    Original     		PDF 74LV374 74LV374 74HC374 74HCT374. 74HCT374 74LV374D 74LV374N DIP20 JESD22-A114E SO20 SSOP20

    74LVC373A

    Abstract: 74LVC573A 74LVC573ABQ 74LVC573AD 74LVC573ADB 74LVC573APW SO20 SSOP20
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC573A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Product specification Supersedes data of 1998 Jul 29 2003 May 26 Philips Semiconductors Product specification Octal D-type transparent latch with


    Original     		PDF 74LVC573A 74LVC573A SCA75 613508/02/pp20 74LVC373A 74LVC573ABQ 74LVC573AD 74LVC573ADB 74LVC573APW SO20 SSOP20

    74LVC374A

    Abstract: 74LVC574A 74LVC574ABQ 74LVC574AD 74LVC574ADB 74LVC574APW SO20 SSOP20
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC574A Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger 3-state Product specification Supersedes data of 1998 Jul 29 2003 Jun 20 Philips Semiconductors Product specification Octal D-type flip-flop with 5 V tolerant


    Original     		PDF 74LVC574A 74LVC574A SCA75 613508/02/pp20 74LVC374A 74LVC574ABQ 74LVC574AD 74LVC574ADB 74LVC574APW SO20 SSOP20

    Untitled

    Abstract: No abstract text available
    Text: 74LVT2245; 74LVTH2245 3.3 V octal transceiver with 30 Ω termination resistors; 3-state Rev. 03 — 23 March 2005 Product data sheet 1. General description The 74LVT2245; 74LVTH2245 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.


    Original     		PDF 74LVT2245; 74LVTH2245 74LVTH2245 LVTH2245

    nxp ahct573

    Abstract: D191D 74AHC373 74AHC573 74AHC573D 74AHC573PW 74AHCT373 74AHCT573 ahct573
    Text: 74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state Rev. 6 — 25 November 2010 Product data sheet 1. General description The 74AHC573; 74AHCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC573; 74AHCT573 74AHCT573 AHCT573 nxp ahct573 D191D 74AHC373 74AHC573 74AHC573D 74AHC573PW 74AHCT373 ahct573

    SSOP20 package

    Abstract: 74LVT573 74LVT573D 74LVT573DB 74LVT573PW JESD22-A114E JESD78 SO20 SSOP20
    Text: 74LVT573 3.3 V octal D-type transparent latch; 3-state Rev. 04 — 15 September 2008 Product data sheet 1. General description The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The


    Original     		PDF 74LVT573 74LVT573 SSOP20 package 74LVT573D 74LVT573DB 74LVT573PW JESD22-A114E JESD78 SO20 SSOP20

    74HC573

    Abstract: 74HC_HCT573 74HC573 20 PIN Current 74HCT573 74HC573 Logic Package Information 74HC573N 74HC573 Datasheet 74HC573-74HCT573 74HC573D 74HCT573D
    Text: 74HC573; 74HCT573 Octal D-type transparent latch; 3-state Rev. 03 — 17 January 2006 Product data sheet 1. General description The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type


    Original     		PDF 74HC573; 74HCT573 74HCT573 HCT573 74HC573 74HC_HCT573 74HC573 20 PIN Current 74HCT573 74HC573 Logic Package Information 74HC573N 74HC573 Datasheet 74HC573-74HCT573 74HC573D 74HCT573D

    74HC14 oscillator application note

    Abstract: 74HC14 74HC14 oscillator application diagram 74HC14 application note 74HC14 so14 74HC14 DIP14 74HCT14 74hc14 philips 74hc14n equivalent 74HCT14N PHILIPS
    Text: INTEGRATED CIRCUITS DATA SHEET 74HC14; 74HCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1997 Aug 26 2003 Oct 30 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74HC14; 74HCT14 FEATURES DESCRIPTION • Applications:


    Original     		PDF 74HC14; 74HCT14 74HC14 74HCT14 SCA75 613508/03/pp23 74HC14 oscillator application note 74HC14 oscillator application diagram 74HC14 application note 74HC14 so14 74HC14 DIP14 74hc14 philips 74hc14n equivalent 74HCT14N PHILIPS

    74HC574

    Abstract: 74HCT574 74LV574 74LV574D 74LV574DB 74LV574N DIP20 JESD22-A114E SO20 MNA800
    Text: 74LV574 Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 04 — 14 May 2009 Product data sheet 1. General description The 74LV574 is an octal D-type flip–flop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock CP and an output


    Original     		PDF 74LV574 74LV574 74HC574 74HCT574. 74HCT574 74LV574D 74LV574DB 74LV574N DIP20 JESD22-A114E SO20 MNA800

    Untitled

    Abstract: No abstract text available
    Text: 74LVC821A 10-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge trigger; 3-state Rev. 4 — 23 November 2012 Product data sheet 1. General description The 74LVC821A is a 10-bit D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input pin CP and an


    Original     		PDF 74LVC821A 10-bit 74LVC821A

    Untitled

    Abstract: No abstract text available
    Text: 74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state Rev. 04 — 3 March 2010 Product data sheet 1. General description The 74AHC573; 74AHCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC573; 74AHCT573 74AHCT573 inpu17 AHCT573

    Untitled

    Abstract: No abstract text available
    Text: 74LVC244A-Q100; 74LVCH244A-Q100 Octal buffer/line driver; 3-state Rev. 1 — 23 August 2012 Product data sheet 1. General description The 74LVC244A-Q100; 74LVCH244A-Q100 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE


    Original     		PDF 74LVC244A-Q100; 74LVCH244A-Q100 74LVCH244A-Q100 LVCH244A

    74LVC11

    Abstract: 74LVC11BQ 74LVC11D 74LVC11DB 74LVC11PW DHVQFN14 SSOP14 TSSOP14
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC11 Triple 3-input AND gate Product specification Supersedes data of 1998 Apr 28 2004 Jan 13 Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 FEATURES DESCRIPTION • Wide supply voltage range from1.2 to 3.6 V


    Original     		PDF 74LVC11 74LVC11 EIA/JESD22-A114-A SCA76 613508/04/pp14 74LVC11BQ 74LVC11D 74LVC11DB 74LVC11PW DHVQFN14 SSOP14 TSSOP14

    SO20 package

    Abstract: 74LVC374A 74LVC574A 74LVC574ABQ 74LVC574AD 74LVC574ADB 74LVC574APW SO20 SSOP20
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC574A Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state Product specification Supersedes data of 2003 Jun 20 2004 Mar 22 Philips Semiconductors Product specification Octal D-type flip-flop with 5 V tolerant


    Original     		PDF 74LVC574A 74LVC574A SCA76 R20/03/pp17 SO20 package 74LVC374A 74LVC574ABQ 74LVC574AD 74LVC574ADB 74LVC574APW SO20 SSOP20

    ahct573

    Abstract: No abstract text available
    Text: 74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state Rev. 7 — 8 November 2011 Product data sheet 1. General description The 74AHC573; 74AHCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC573; 74AHCT573 74AHCT573 AHCT573 ahct573

    Untitled

    Abstract: No abstract text available
    Text: 74LVC541A Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state Rev. 4 — 25 November 2011 Product data sheet 1. General description The 74LVC541A is an octal non-inverting buffer/line driver with 5 V tolerant inputs and outputs. The 3-state outputs are controlled by the output enable inputs OE1 and OE2.


    Original     		PDF 74LVC541A 74LVC541A

    Untitled

    Abstract: No abstract text available
    Text: 74LVC244A; 74LVCH244A Octal buffer/line driver; 3-state Rev. 7 — 22 November 2011 Product data sheet 1. General description The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.


    Original     		PDF 74LVC244A; 74LVCH244A 74LVCH244A LVCH244A

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DAT 74LVC373A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Product specification Supersedes data of 1998 Jul 29 2003 May 19 Philips Semiconductors Product specification Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state


    Original     		PDF 74LVC373A 74LVC373A SCA75 613508/02/pp20

    hct14

    Abstract: No abstract text available
    Text: 74HC14; 74HCT14 Hex inverting Schmitt trigger Rev. 5 — 19 December 2011 Product data sheet 1. General description The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74HC14; 74HCT14 74HCT14 EIA/JESD22-A114F EIA/JESD22-A115-A HCT14 hct14

    Untitled

    Abstract: No abstract text available
    Text: 74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state Rev. 7 — 8 November 2011 Product data sheet 1. General description The 74AHC573; 74AHCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74AHC573; 74AHCT573 74AHCT573 AHCT573

    MNA196

    Abstract: CP/2012
    Text: 74ABT374A Octal D-type flip-flop; positive-edge trigger; 3-state Rev. 2 — 18 December 2012 Product data sheet 1. General description The 74ABT374A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.


    Original     		PDF 74ABT374A 74ABT374A MNA196 CP/2012

    Untitled

    Abstract: No abstract text available
    Text: 74AHC257-Q100; 74AHCT257-Q100 Quad 2-input multiplexer; 3-state Rev. 1 — 22 July 2013 Product data sheet 1. General description The 74AHC257-Q100; 74AHCT257-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with


    Original     		PDF 74AHC257-Q100; 74AHCT257-Q100 74AHCT257-Q100 AHCT257

    74hc14

    Abstract: ci 74hc14
    Text: 74HC14-Q100; 74HCT14-Q100 Hex inverting Schmitt trigger Rev. 2 — 10 August 2012 Product data sheet 1. General description The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with


    Original     		PDF 74HC14-Q100; 74HCT14-Q100 74HCT14-Q100 74hc14 ci 74hc14