SN54LV165
Abstract: SN74LV165 SN74LV165D SN74LV165DBLE SN74LV165DR SN74LV165PWLE
Text: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B – MARCH 1995 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV165,
SN74LV165
SCES007B
MIL-STD-883C,
JESD-17
300-mil
SN54LV165
SN54LV165
SN74LV165
SN74LV165D
SN74LV165DBLE
SN74LV165DR
SN74LV165PWLE
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PDF
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SN54LV165
Abstract: SN74LV165
Text: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B – MARCH 1995 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV165,
SN74LV165
SCES007B
MIL-STD-883C,
JESD-17
300-mil
SN54LV165
SN54LV165
SN74LV165
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B – MARCH 1995 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV165,
SN74LV165
SCES007B
MIL-STD-883C,
JESD-17
300-mil
SN54LV165
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PDF
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lv165
Abstract: SN54LV165 SN74LV165
Text: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B – MARCH 1995 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV165,
SN74LV165
SCES007B
MIL-STD-883C,
JESD-17
300-mil
SN54LV165
lv165
SN54LV165
SN74LV165
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PDF
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SN74ALVCH162245
Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Text: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9
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SN74HC02 Spice model
Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Text: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest
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25x16v
Abstract: No abstract text available
Text: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B - MARCH 1996 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process typical Vq l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)
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OCR Scan
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SN54LV165,
SN74LV165
SCES007B
SN54LV165.
SN74LV165
MIL-STD-883C,
JESD-17
25x16v
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PDF
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