W2Z512K72SJ Search Results
W2Z512K72SJ Datasheets (1)
Part |
ECAD Model |
Manufacturer |
Description |
Datasheet Type |
PDF |
PDF Size |
Page count |
---|---|---|---|---|---|---|---|
W2Z512K72SJ | White Electronic Designs | Density = 36Mb Organization = 512Kx72 Speed MHZ = 150-225 Volt = 2.5 Package = 209 Pbga | Original | 284.05KB | 12 |
W2Z512K72SJ Datasheets Context Search
Catalog Datasheet |
Type |
Document Tags |
PDF |
---|---|---|---|
Contextual Info: 512K x 72 ZBL SSRAM Multi-Chip Package Optimum Density and Performance in One Package W2Z512K72SJxxBC/BI • Designed as main memory for advanced processors see page 2 for typical application block diagram Performance Features Benefits • Pipeline Zero Bus Latency SSRAM for 100 percent |
Original |
W2Z512K72SJxxBC/BI 100MHz WEDPZ512K72X-XBX* x64/x72 WEDPZ512K72X | |
Contextual Info: W2Z512K72SJ White Electronic Designs 36Mb, 512K x 72 Synchronous Pipeline Burst NBL SRAM Advanced* FEATURES DESCRIPTION n n n n n n n The WEDC SyncBurst - SRAM family employs highspeed, low-power CMOS designs that are fabricated using an advanced CMOS process. WEDCs 72Mb |
Original |
150MHz W2Z512K72SJ 209-bump W2Z512K72SJ35ES W2Z512K72SJ38ES W2Z512K72SJ28BC W2Z512K72SJ30BC W2Z512K72SJ35BC W2Z512K72SJ38BC W2Z512K72SJ30BI | |
W2Z512K72SJContextual Info: W2Z512K72SJ 36Mb, 512Kx72 Synchronous Pipeline Burst NBL SRAM Preliminary* FEATURES DESCRIPTION n Fast clock speed: 225, 200, 166 and 150MHz The WEDC SyncBurst - SRAM family employs highspeed, low-power CMOS designs that are fabricated using an advanced CMOS process. WEDCs 72Mb |
Original |
W2Z512K72SJ 512Kx72 150MHz 512Kx36 W2Z512K72SJ35ES W2Z512K72SJ38ES W2Z512K72SJ28BC W2Z512K72SJ30BC W2Z512K72SJ35BC W2Z512K72SJ |