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    74AUP3G04GM Search Results

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    74AUP3G04GM Price and Stock

    Rochester Electronics LLC 74AUP3G04GM,125

    IC INVERTER 3CH 3-INP 8XQFN
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    DigiKey 74AUP3G04GM,125 Bulk 2,219
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    Nexperia 74AUP3G04GM,125

    IC INVERTER 3CH 3-INP 8XQFN
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    DigiKey 74AUP3G04GM,125 Reel
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    74AUP3G04GM,125 Cut Tape
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    74AUP3G04GM,125 Digi-Reel 1
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    Nexperia 74AUP3G04GM125

    Inverter 3-Element CMOS 8-Pin XQFN8U T/R - Tape and Reel (Alt: 74AUP3G04GM,125)
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    Avnet Americas 74AUP3G04GM125 Reel 4,000
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    NXP Semiconductors 74AUP3G04GM,125

    74AUP3G04GM - Inverter, AUP/ULP/V Series, 3-Func, 1-Input, SOT902-1, QFN-8 '
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    Rochester Electronics 74AUP3G04GM,125 39,273 1
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    NXP Semiconductors 74AUP3G04GM

    INVERTER; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 8; Package Code: HVQCCN; Package Shape: SQUARE;
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    Vyrian 74AUP3G04GM 411
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    74AUP3G04GM Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP3G04GM NXP Semiconductors Low-power triple inverter Original PDF
    74AUP3G04GM NXP Semiconductors 74AUP3G04 - IC AUP/ULP/V SERIES, TRIPLE 1-INPUT INVERT GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8, Gate Original PDF
    74AUP3G04GM,125 NXP Semiconductors Low-power triple inverter; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP3G04GM,125 NXP Semiconductors 74AUP3G04 - IC AUP/ULP/V SERIES, TRIPLE 1-INPUT INVERT GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate Original PDF

    74AUP3G04GM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP3G04 Low-power triple inverter Rev. 7 — 29 January 2013 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


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    74AUP3G04 74AUP3G04 PDF

    marking code E2 logic gate

    Abstract: SN74LVC3G04DCUR 74AUP3G04 74LVC3G04 NC7NP04 NC7NZ04 NL37WZ04 SN74LVC3G04 "MARKING CODE" 3Y
    Text: SLG74LB3G04 GreenLIBTM TRIPLE INVERTER GATE General Description Features The GreenLIB provides the triple inverter gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging


    Original
    SLG74LB3G04 000-0074LB3G04-10 marking code E2 logic gate SN74LVC3G04DCUR 74AUP3G04 74LVC3G04 NC7NP04 NC7NZ04 NL37WZ04 SN74LVC3G04 "MARKING CODE" 3Y PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP3G04 Low-power triple inverter Rev. 5 — 9 December 2011 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP3G04 Low-power triple inverter Rev. 01 — 24 May 2007 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


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    74AUP3G04 74AUP3G04 PDF

    sot1116

    Abstract: 74AUP3G04 74AUP3G04DC 74AUP3G04GT SOT1203
    Text: 74AUP3G04 Low-power triple inverter Rev. 4 — 30 July 2010 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 sot1116 74AUP3G04DC 74AUP3G04GT SOT1203 PDF

    74AUP3G04

    Abstract: 74AUP3G04DC 74AUP3G04GM 74AUP3G04GT
    Text: 74AUP3G04 Low-power triple inverter Rev. 03 — 8 October 2009 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 74AUP3G04DC 74AUP3G04GM 74AUP3G04GT PDF

    74AUP3G04

    Abstract: 74AUP3G04DC 74AUP3G04GM 74AUP3G04GT JESD22-A114E MO-187
    Text: 74AUP3G04 Low-power triple inverter Rev. 02 — 13 March 2008 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 74AUP3G04DC 74AUP3G04GM 74AUP3G04GT JESD22-A114E MO-187 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP3G04 Low-power triple inverter Rev. 6 — 14 June 2012 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP3G04 Low-power triple inverter Rev. 6 — 14 June 2012 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-voltage triple inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP3G04 74AUP3G04 PDF