HY5MS5B6BL
Abstract: HY5MS5B6BLFP
Text: 256Mbit MOBILE DDR SDRAM based on 4M x 4Bank x16 I/O Document Title 256Mbit 4Bank x 4M x 16bits MOBILE DDR SDRAM Revision History Revision No. History Draft Date Remark 0.1 Initial Draft Apr. 2007 Preliminary This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
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Original
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PDF
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256Mbit
256Mbit
16bits)
16bit)
00Typ.
HY5MS5B6BL
HY5MS5B6BLFP
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HY5MS5B6BLFP
Abstract: HY5MS5B6BL
Text: 128Mbit MOBILE DDR SDRAM based on 2M x 4Bank x16 I/O Specification of 128M 8Mx16bit Mobile DDR SDRAM Memory Cell Array - Organized as 4banks of 2,097,152 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
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Original
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PDF
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128Mbit
8Mx16bit)
128Mbit
16bit)
H5MS1262EFP
16bits)
HY5MS5B6BLFP
HY5MS5B6BL
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H5TQ2G63BFR-H9C
Abstract: H5TQ1G83BFR-H9C H26M42001EFR H5RS1H23MFR h27u1g8f2b H27U1G8F2 H27UBG8T2A H27UBG8T H5MS2G22MFR-J3M H26M54001BKR
Text: Rev 0.0 Q2’2010 Databook C omputing Memory DDR3 SDRAM : Component VDD DENSITY ORG. SPEED PART NUMBER PKG. FEATURE AVAIL. 1.5V 1Gb 256Mx4 DDR3 1333 H5TQ1G43BFR-H9C FBGA 78ball 8Bank, 1.5V, CL9,9-9-9 Now H5TQ1G43TFR-H9C FBGA(78ball) 8Bank, 1.5V, CL9,9-9-9
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Original
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PDF
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256Mx4
H5TQ1G43BFR-H9C
78ball)
H5TQ1G43TFR-H9C
H5TQ1G43BFR-G7C
H5TQ1G43TFR-G7C
H5TQ1G83BFR-H9C
H5TQ2G63BFR-H9C
H5TQ1G83BFR-H9C
H26M42001EFR
H5RS1H23MFR
h27u1g8f2b
H27U1G8F2
H27UBG8T2A
H27UBG8T
H5MS2G22MFR-J3M
H26M54001BKR
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Untitled
Abstract: No abstract text available
Text: 256Mbit MOBILE DDR SDRAM based on 4M x 4Bank x16 I/O Document Title 256Mbit 4Bank x 4M x 16bits MOBILE DDR SDRAM Revision History Revision No. History Draft Date Remark Preliminary 0.1 - Initial Draft Apr. 2007 1.0 - Added some notes for operating voltage and temperature
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Original
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PDF
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256Mbit
256Mbit
16bits)
LPDDR266/200
16bit)
00Typ.
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hynix mcp
Abstract: HY5MS5B6BL H5MS1262EFP 2Mx16
Text: 128Mbit MOBILE DDR SDRAM based on 2M x 4Bank x16 I/O Specification of 128M 8Mx16bit Mobile DDR SDRAM Memory Cell Array - Organized as 4banks of 2,097,152 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
|
Original
|
PDF
|
128Mbit
8Mx16bit)
128Mbit
16bits)
16bit)
H5MS1262EFP
00Typ.
hynix mcp
HY5MS5B6BL
2Mx16
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