Advanced Boot Block Flash
Abstract: AES-128 CS201 CS281 CS289 AGLP125
Text: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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130-nm,
Advanced Boot Block Flash
AES-128
CS201
CS281
CS289
AGLP125
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Untitled
Abstract: No abstract text available
Text: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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QN68
Abstract: VQ100 PAC11 ProASIC3 handbook
Text: Advance v0.5 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process
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PDF
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130-nm,
128-Bit
QN68
VQ100
PAC11
ProASIC3 handbook
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Untitled
Abstract: No abstract text available
Text: Revision 15 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 K to 1 M System Gates • Up to 144 Kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS
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PDF
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130-nm,
64-Bit
128-Bit
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CPLD
Abstract: CS-289
Text: Revision 14 IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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Untitled
Abstract: No abstract text available
Text: v1.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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PDF
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AGL250
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peak china qfn 9 x 9 tray drawing
Abstract: semi catalog AGL1000-FG484
Text: IGLOO Handbook IGLOO Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOO Datasheet IGLOO Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
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Untitled
Abstract: No abstract text available
Text: Product Brief 1 – IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits High-Performance Routing Hierarchy Low Power Advanced I/O • Segmented, Hierarchical Routing and Clock Structure • • • • • 1.2 V or 1.5 V Core Voltage for Low Power
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br 8892
Abstract: No abstract text available
Text: IGLOO Datasheet P ro du c t Br ie f 1 – IGLOO™ Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation
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130-nm,
IO44RSB1
IO45RSB1.
121-Pin
AGL060
256-Pin
AGL1000
281-Pin
100-Pin
br 8892
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ProASIC PLUS v0.1
Abstract: AGL015
Text: v1.2 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
ProASIC PLUS v0.1
AGL015
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Untitled
Abstract: No abstract text available
Text: IGLOO Handbook IGLOO Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i-i Section I – IGLOO™ Datasheet IGLOO™ Low-Power Flash FPGAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
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Untitled
Abstract: No abstract text available
Text: IGLOO nano Handbook IGLOO nano Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOO nano Datasheet IGLOO nano Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
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Power Track servo v1.0
Abstract: No abstract text available
Text: IGLOO Handbook IGLOO Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOO™ Datasheet IGLOO™ Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
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Untitled
Abstract: No abstract text available
Text: IGLOO Datasheet Product Brief 1 – IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
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PS 229
Abstract: A3P250 A3P400 A3P600 PQ208 QN132 VQ100 cmos switch charge pump A3P100 A3P015
Text: Revision 10 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS
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Original
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PDF
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130-nm,
64-Bit
128-Bit
PS 229
A3P250
A3P400
A3P600
PQ208
QN132
VQ100
cmos switch charge pump
A3P100
A3P015
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Actel igloo
Abstract: Datasheet AGLN020 CS81 VQ100 RAM51 AGLN010
Text: Advance v0.8 IGLOO nano Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits High-Performance Routing Hierarchy Low Power Advanced I/Os • Segmented, Hierarchical Routing and Clock Structure • • • • • nanoPower Consumption—Industry’s Lowest Power
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71most
Actel igloo
Datasheet AGLN020
CS81
VQ100
RAM51
AGLN010
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AGL015
Abstract: No abstract text available
Text: Product Brief 1 – IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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Original
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PDF
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130-nm,
AGL015
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Untitled
Abstract: No abstract text available
Text: Revision 9 ProASIC3 nano Flash FPGAs Features and Benefits Advanced I/Os • 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V
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Untitled
Abstract: No abstract text available
Text: Revision 13 IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits High-Performance Routing Hierarchy Low Power Advanced I/Os • Segmented, Hierarchical Routing and Clock Structure • • • • • nanoPower Consumption—Industry’s Lowest Power
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130nm CMOS
Abstract: gl 1000 IO98PPB3 semi catalog
Text: Revision 20 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
130nm CMOS
gl 1000
IO98PPB3
semi catalog
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A3P1000
Abstract: 160 e7 Datasheet A3P125 FBGA A3P250 A3P030 FBGA A3P600
Text: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at
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48-Pin
A3P030
IO82RSB1
IO24RSB0
GEC0/IO73RSB1
IO22RSB0
GEA0/IO72RSB1
A3P1000
160 e7
Datasheet A3P125
FBGA A3P250
FBGA A3P600
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A3P060
Abstract: A3P125 A3P400 A3P030 FBGA A3P600 A3P1000
Text: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at
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48-Pin
A3P030
IO82RSB1
IO24RSB0
GEC0/IO73RSB1
IO22RSB0
GEA0/IO72RSB1
A3P060
A3P125
A3P400
FBGA A3P600
A3P1000
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Untitled
Abstract: No abstract text available
Text: Revision 10 ProASIC3 nano Flash FPGAs Features and Benefits Advanced I/Os • 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V
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AGL400
Abstract: IO30RSB0 IO127RSB2 AGL1000 ACTEL FBGA 144 qfn 132pin
Text: IGLOO Packaging 3 – Package Pin Assignments 81-Pin µCSP A1 Ball Pad Corner 9 8 7 6 5 4 3 2 1 A B C D E F G H J Note: This is the bottom view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
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81-Pin
AGL030
IO00RSB0
GEB0/IO71RSB1
IO63RSB1
AGL400
IO30RSB0
IO127RSB2
AGL1000
ACTEL FBGA 144
qfn 132pin
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