NE33200N Search Results

NE33200N Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
NE33200N		NEC	SUPER LOW NOISE HJ FET		Original	PDF
NE33200N		NEC	SUPER LOW NOISE HJ FET		Scan	PDF

NE33200N Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
GM 90 562 573 Abstract: NE33200 NE33200M NE33200N Text: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to	Original	PDF	NE33200 NE33200 24-Hour GM 90 562 573 NE33200M NE33200N
NE33200 Abstract: NE33200M NE33200N Text: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to	Original	PDF	NE33200 NE33200 24-Hour NE33200M NE33200N
Untitled Abstract: No abstract text available Text: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to	Original	PDF	NE33200 NE33200 24-Hour
Untitled Abstract: No abstract text available Text: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to	Original	PDF	NE33200 NE33200 24-Hour
Untitled Abstract: No abstract text available Text: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSO CIATED GAIN vs. FREQ UENCY V ds = 2 V, Ids = 10 mA • VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz • HIGH ASS O C IA TED GAIN: 10.5 dB Typical at 12 GHz • GATE LENGTH: 0.3 \|im • GATE W ID TH : 280 nm	OCR Scan	PDF	NE33200 NE33200 NE33200N NE33200M lS22l
NE33200 Abstract: LG 631 low noise, hetero junction fet NE33200M NE33200N sl2 357 sn 7441 Text: SUPER LOW NOISE HJ FET FEATURES NE33200 N O IS E F IG U R E & A S S O C IA T E D G A IN vs. F R E Q U E N C Y V ds = 2 V, I ds = 10 m A • V E R Y L O W N O IS E FIG U R E : 0 .7 5 dB typica l at 12 G H z • H IG H A S S O C IA T E D G A IN : 10.5 dB T ypica l at 12 G H z	OCR Scan	PDF	NE33200 NE33200 S12S21\| 24-Hour LG 631 low noise, hetero junction fet NE33200M NE33200N sl2 357 sn 7441
sn 7441 Abstract: No abstract text available Text: NEC SUPER LOW NOISE HJ FET FEATURES_ NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY • VERY LOW NOISE FIGURE: V ds = 2 V, Ids = 10 m A 0 75 dB typical at 12 GHz • HIGH ASSOCIATED GAIN: 10.5 dB Typical at 12 GHz • GATE LENGTH: 0.3 nm • GATE WIDTH: 280 \|j.m	OCR Scan	PDF	NE33200 NE33200 NE33200N NE33200M IS221 sn 7441
Untitled Abstract: No abstract text available Text: SU PER LOW NOISE HJ FET FEATURES_ NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY Vd s = 2 V, Ids = 10 mA • VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz 4 - - -I- .1 1 - r 24 • HIGH ASSOCIATED GAIN:	OCR Scan	PDF	NE33200 NE33200 sur33200 NE33200N NE33200M 300nm IS12I IS22I2 IS12I