44-PIN
Abstract: LH532048 QFJ044-P-0650
Text: LH532048 • Access time: 100 ns MAX. 40-PIN DIP 40-PIN SOP TOP VIEW • Static operation NC 1 40 VCC CE 2 39 NC • TTL compatible I/O D15 3 38 A16 4 • Three-state outputs D14 37 A15 D13 5 36 A14 • Single +5 V power supply D12 6 35 A13 D11 7 34 A12
|
Original
|
PDF
|
LH532048
40-PIN
44QFJ-2
44-pin,
650-mil
40-pin,
600-mil
DIP040-P-0600)
44-PIN
LH532048
QFJ044-P-0650
|
a1334
Abstract: K3N3C1 40DIP600
Text: K3N3C1000D-D G C CMOS MASK ROM 4M-Bit (512Kx8 /256Kx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable orginization 524,288 x 8(byte mode) 262,144 x 16(word mode) • Fast access time : 80ns(Max.) • Supply voltage : single +5V • Current consumption
|
Original
|
PDF
|
K3N3C1000D-D
512Kx8
/256Kx16)
K3N3C1000D-DC
40-DIP-600
K3N3C1000D-GC
40-SOP-525
40-DIP-600
015MIN
a1334
K3N3C1
40DIP600
|
Macronix
Abstract: architecture in 4289 MX29F400C Macronix International am29f400b 2257h
Text: APPLICATION NOTE Migrating to the Macronix MX29F200C & MX29F400C Flash Families from Spansion Am29F200B & Am29F400B Memory Devices. Contents Introduction. 2
|
Original
|
PDF
|
MX29F200C
MX29F400C
Am29F200B
Am29F400B
Macronix
architecture in 4289
Macronix International
2257h
|
40-pin EPROM pinout
Abstract: 44-PIN LH531024 QFJ044-P-S650 C1161
Text: LH531024 FEATURES • 65,536 words x 16 bit organization CMOS 1M 64K × 16 MROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW • Access time: 100 ns (MAX.) • Power consumption: Operating: 412.5 mW (MAX.) Standby: 550 µW (MAX.) VCC NC 1 40 CE 2 39 NC
|
Original
|
PDF
|
LH531024
40-PIN
40-pin,
600-mil
525-mil
44QFJ-1
44-pin,
650-mil
40-pin EPROM pinout
44-PIN
LH531024
QFJ044-P-S650
C1161
|
Z04B
Abstract: MR27V6441L MARK Z04D MR27V6441L-xxxMP Z04D 48TSOP2 ST03
Text: OKI Semiconductor MR27V6441L PEDR27V6441L-02-03 Issue Date: April 4, 2005 Preliminary 64M x 1–Bit Serial Production Programmed ROM P2ROM GENERAL DESCRIPTION The MR27V6441L is a 64 Mbit Production Programmed Read-Only Memory, which is configured as 67,108,864 word × 1-bit. The MR27V6441L supports a simple read operation using a single 3.3V power supply
|
Original
|
PDF
|
MR27V6441L
PEDR27V6441L-02-03
MR27V6441L
33MHz
20MHz
42SOJ
48BGA
28SOP
Z04B
MARK Z04D
MR27V6441L-xxxMP
Z04D
48TSOP2
ST03
|
Z04B
Abstract: MARK Z04D
Text: FEDR27T1641L-02-H1 OKI Semiconductor MR27T1641L This version : Feb.28, 2005 Previous version: -.- 8M x 1–Bit Serial Production Programmed ROM P2ROM GENERAL DESCRIPTION The MR27T1641L is a 16 Mbit Production Programmed Read-Only Memory, which is configured as
|
Original
|
PDF
|
FEDR27T1641L-02-H1
MR27T1641L
MR27T1641L
30MHz
20MHz
42SOJ
48BGA
28SOP
Z04B
MARK Z04D
|
Untitled
Abstract: No abstract text available
Text: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.
|
Original
|
PDF
|
|
DIP-40L
Abstract: ic 8255A 80C86 80C88 WS82C55A WS82C55A-5C WS82C55A-5P WS82C55A-5Q WS82C55AC WS82C55AP
Text: CMOS Programmable peripheral Interface WS82C55A Features Description • Pin Compatible with NMOS 8255A The WS82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process Scaled SAJI IV . It
|
Original
|
PDF
|
WS82C55A
WS82C55A
80C86,
QFP-44
DIP-40L
ic 8255A
80C86
80C88
WS82C55A-5C
WS82C55A-5P
WS82C55A-5Q
WS82C55AC
WS82C55AP
|
48-PIN
Abstract: LH532000B-1
Text: LH532000B-1 FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.) • Mask-programmable control pin
|
Original
|
PDF
|
LH532000B-1
40-pin
DIP/40-pin
40-pin,
600-mil
525-mil
48-pin,
LH532000B-1
technol80
48-PIN
|
48-PIN
Abstract: LH534
Text: LH534000B-S FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words × 16 bit organization (Word mode) • Access times: 500 ns (2.6 V ≤ VCC < 4.5 V) 200 ns (4.5 V ≤ VCC ≤ 5.5 V) • Wide range power supply: 2.6 to 5.5 V • Static operation
|
Original
|
PDF
|
LH534000B-S
8/256K
40-PIN
40-pin,
600-mil
525-mil
48-pin,
LH534000B-S
48-PIN
LH534
|
48-PIN
Abstract: d1220
Text: LH534600B FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words × 16 bit organization (Word mode) CMOS 4M (512K × 8/256K × 16) Mask-Programmable ROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW A17 1 40 A8 A7 2 39 A9 • BYTE input pin selects bit configuration
|
Original
|
PDF
|
LH534600B
8/256K
40-PIN
40-pin,
600-mil
525-mil
48-pin,
48TSOP
48-PIN
d1220
|
48-PIN
Abstract: No abstract text available
Text: LH53V4000 FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words × 16 bit organization (Word mode) • Access times: 200 ns (MAX.) at 3.0 V ≤ VCC < 4.5 V 100 ns (MAX) at 4.5 V ≤ VCC ≤ 5.5 V • Power consumption: Operating: 108 mW (MAX.) at 3.0 V ≤ VCC ≤ 3.6 V
|
Original
|
PDF
|
LH53V4000
600-mil
525-mil
8/256K
40-PIN
48TSOP
48-pin,
40-pin,
48-PIN
|
KM23V4100D
Abstract: KM23V4100DG 40DIP600 40-DIP-600
Text: KM23V4100D G CMOS MASK ROM 4M-Bit (512Kx8 /256Kx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable orginization 524,288 x 8(byte mode) 262,144 x 16(word mode) • Fast access time 3.3V Operation : 100ns(Max.) 3.0V Operation : 120ns(Max.) • Supply voltage : single +3.0V/ single +3.3V
|
Original
|
PDF
|
KM23V4100D
512Kx8
/256Kx16)
100ns
120ns
KM23V4100D
40-DIP-600
KM23V4100DG
40-SOP-525
KM23V4100DG
40DIP600
40-DIP-600
|
Untitled
Abstract: No abstract text available
Text: LH53V4P00 CMOS 4M 512K x 8/256K × 16 MROM FEATURES PIN CONNECTIONS • 524,288 × 8 bit organization (Byte mode: BYTE = VIL) 262,144 × 16 bit organization (Word mode: BYTE = VIH) 40-PIN SOP TOP VIEW A17 1 40 A8 A7 2 39 A9 • Access time: 120 ns (MAX.)
|
Original
|
PDF
|
LH53V4P00
40-pin,
525-mil
LH53V4P00
8/256K
40-PIN
40SOP
OP040-P-0525)
|
|
48-PIN
Abstract: A10C A12C A15C LH532000B
Text: LH532000B FEATURES CMOS 2M 256K x 8/128K x 16 M ask-Program m able ROM PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) 40-PIN DIP 40-PIN SOP TOP VI EW f 1• \ 40 ZI Ag a 7C 2 39 U Ag AgiZ
|
OCR Scan
|
PDF
|
LH532000B
256Kx8/128KX16)
40-pin,
600-mil
525-mil
48-pin,
12x18
48tsop
48-PIN
A10C
A12C
A15C
|
lh5s4
Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
Text: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.
|
OCR Scan
|
PDF
|
LH53H4100
LH53H4100D/N
LH5H41XX)
LH53H4100D
LH53H4100N
32-pin
DIP032-P-0600)
OP032-P-0525)
A0-A18
lh5s4
lh5348
LH5s
lh5s47xx
48-TSOP
LH53H4100N
lh534y00d
48TSOP
sharp mask rom
|
LH64256BK70
Abstract: Lh64256bk-70
Text: MEMORIES ★Under development • Pseudo S tatic RAMs Gipäfifty rüm ^H M o n Modal No. worfexblta t LH5P832/D/N-10 256k Supply.currant AOOMtttM# Cyetotime operating/standby (na)MAX. (na) MIN. 100 160 (mA) MAX. Supply voltage M Control signal« 65/3 32k x 8
|
OCR Scan
|
PDF
|
LH5P832/D/N-10
28DIP/
28SK-DIP/
28SOP
32DIP/32SOP
32SOP
40DIP/40SOP
LH5P832/D/N-12
LH5P860/N-80
LH5P864N-80
LH64256BK70
Lh64256bk-70
|
536G
Abstract: LH534600
Text: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)
|
OCR Scan
|
PDF
|
LH53259D/N/T
LH53517D/N/T/TR
LH531VOOD/N/TAJ
LH53V1ROON/T
LH530800AD/AN/AU
LHS30800AD/AN-Y
LH531OOOBD/BN
LH531000BN-S
LH531024D/N/U
LH532100BD
536G
LH534600
|
LH61664AK-50
Abstract: LH61665AK lh61665 LH5PV8512 16256S
Text: PSEUDO SRAM/DYNAMIC RAM • PSEUDO SRAMs ♦ Features • Random access memory with ease of use equivalent to SRAM. Supply current MAX. C apacity Bit C onfiguration 256k x 8 Model No. LH 5P 832/D /N -10/12 Access time ns MAX. Cycle time (ns) MIN. O perating
|
OCR Scan
|
PDF
|
LH5P864N
5P1632/N-80/15
32SOP
DIP/40SOP
32DIP/32SOP/32TSOP
32TSOP
DIP/32SOP/32TSOP(
/32TS
44TSO
LH61664AK-50
LH61665AK
lh61665
LH5PV8512
16256S
|
KM23V4100C
Abstract: KM-23V4100CG
Text: KM23V4100C G/T ci cr*1 ELECTRONICS CMOS Mask ROM 4M-Bit (512K X 8/256K x 16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 524,288 x 8 (byte mode) 262,144 x 16(word mode) • Supply voltage : 2.7V to 3.6V • Fast access time 3.0V Operation: 150ns(max.)
|
OCR Scan
|
PDF
|
KM23V4100C
8/256K
150ns
120ns
KM23V4100C
40-DIP-600
KM23V4100CG
-SOP-525
KM23V4100CT
44-TSOP2-400
KM-23V4100CG
|
LH64400CK-70
Abstract: lh61664 LH62800K-60 LH64400 lh64260 LH64400CK-60 20DIP LH62800 LH61664N LH61664 K-70
Text: MEMORIES Dynamic RAMs ★ U n d e r d e v e lo p m e n t C apacity Configuration Model No. Mode A ccess tim e ns 50 256k 256k x 1 Page mode LH21256 256kx4 Fast page mode LH64256B 6 4 k x 16 Fast page mode LH61664 256kx8 Fast page mode LH62800 Fast page mode
|
OCR Scan
|
PDF
|
LH21256
256kx4
LH64256B
LH61664
256kx8
LH62800
LH64400C
LH64405
LH64260
LH6S4260
LH64400CK-70
lh61664
LH62800K-60
LH64400
lh64260
LH64400CK-60
20DIP
LH62800
LH61664N
LH61664 K-70
|
80N80
Abstract: ENS-60
Text: MEMORIES Pseudo Static RAMs ★ Under developm ent C apacity C onfiguration Model No. A ccess tim e ns 60 LH5P860 70 80 100 120 150 - 64k x 8 LH5PB64 512k Pseudo Static RAM 32kx 16 LH5P1632 LH5P8128 1M 126kx8 LH5P8129 Low voltage operation 4M ★LH5PV8512
|
OCR Scan
|
PDF
|
LH5P860
LH5PB64
LH5P1632
LH5P8128
126kx8
LH5P8129
LH5PV8512
LH5P832/D/N-10
28SK-DIP/
28SOP
80N80
ENS-60
|
LH231G
Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Text: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200
|
OCR Scan
|
PDF
|
28DIP
28DIP
LH2389D
LH23128D
LH23286D
LH236120
LH2310006D
LH231G
lh5348
LH538b
LH2326
lh5s4
LHMN5
lh5359
lh5348xx
lh537
LH235
|
lh5s4
Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Text: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.
|
OCR Scan
|
PDF
|
LH531000BN-S
LH53V2P00AN/AT
LH53V4P00N/T
LH53V8500N/T
LH53V16500AN/AT
LH53V32500AN-2
LH53V32500AT-2
LH53V64P00T
LH53V64POON
LH53V12800T
lh5s4
lh537
48-TSOP
LH5s
42-DIP
48TSOP1
LH5364P00D
LH538
LH5S46
|