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    XCV405E Datasheets (44)

    Part ECAD Model Manufacturer Description Curated Type PDF
    XCV405E Xilinx Extended Memory Field Programmable Gate Arrays Original PDF
    XCV405E-6BG560C Xilinx Virtex-E 1.8V extended memory field programmable gate array. Original PDF
    XCV405E-6BG560C Xilinx 560KBITS BRAM 400000 SYSTEM GATES 404 I/ - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-6BG560C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 560MBGA Original PDF
    XCV405E-6BG560I Xilinx Virtex-E 1.8V extended memory field programmable gate array. Original PDF
    XCV405E-6BG560I Xilinx 560KBITS BRAM 400000 SYSTEM GATES 404 - - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-6BG560I Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 560MBGA Original PDF
    XCV405E-6BGG560C Xilinx XCV405E-6BGG560C - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-6BGG560I Xilinx XCV405E-6BGG560I - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-6FG560C Xilinx Extended Memory Field Programmable Gate Arrays Original PDF
    XCV405E-6FG560I Xilinx Extended Memory Field Programmable Gate Arrays Original PDF
    XCV405E-6FG676C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 676FBGA Original PDF
    XCV405E-6FG676C Xilinx Virtex-E 1.8V extended memory field programmable gate array. Original PDF
    XCV405E-6FG676C Xilinx 560KBITS BRAM 400000 SYSTEM GATES 404 I/ - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-6FG676I Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 676FBGA Original PDF
    XCV405E-6FG676I Xilinx Virtex-E 1.8V extended memory field programmable gate array. Original PDF
    XCV405E-6FG676I Xilinx 560KBITS BRAM 400000 SYSTEM GATES 404 - - NOT RECOMMENDED for NEW DESIGN Original PDF
    XCV405E-7BG560C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 404 I/O 560MBGA Original PDF
    XCV405E-7BG560C Xilinx Virtex-E 1.8V extended memory field programmable gate array. Original PDF
    XCV405E-7BG560C Xilinx 560KBITS BRAM 400000 SYSTEM GATES 404 I/ - NOT RECOMMENDED for NEW DESIGN Original PDF

    XCV405E Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LVDSEXT-25

    Abstract: BLVDS-25 LVDSEXT25 bga 896 BGA 31 x 31 mm XC2V80 XC2V8000 XC2V40 XC2V250 XC2V500
    Text: XILINX VIRTEX FPGAs http://www.xilinx.com/products/platform/ Pins Body Size I/O’s 204 348 396 564 852 88 120 200 264 432 528 624 720 912 1104 1296 XCV812E XCV405E XCV3200E XCV2600E XCV2000E V-EM 1.8V XCV1600E XCV1000E XCV600E XCV400E XCV300E XCV200E XCV100E


    Original     		PDF XC2V250 XC2V500 XC2VP20 XC2VP50 XC2V40 XC2V80 XC2V1000 XC2V1500 XC2V2000 XC2V3000 LVDSEXT-25 BLVDS-25 LVDSEXT25 bga 896 BGA 31 x 31 mm XC2V8000

    SRL16E

    Abstract: SRL16 XIP2004 XIP2005 XIP2006 XIP2007 XIP2008 SRL16Es binaryencoded Ternary CAM
    Text: Content-Addressable Memory V3.0 March 14, 2002 Product Specification DIN[n:0] WR_ADDR[m:0] DATA_MASK[n:0] Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: logicore@xilinx.com URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com


    Original     		PDF XIP2004 SRL16E SRL16 XIP2004 XIP2005 XIP2006 XIP2007 XIP2008 SRL16Es binaryencoded Ternary CAM

    XAPP137

    Abstract: FPGA Virtex 6 pin configuration XAPP138 CF75h XAPP132 XAPP139 XC4000 XC4000X XC4000XLA XCV50
    Text: Application Note: Virtex Series Virtex FPGA Series Configuration and Readback R XAPP138 v2.5 November 5, 2001 Summary This application note is offered as complementary text to the configuration section of the Virtex data sheet. It is strongly recommended that the Virtex data sheets be reviewed prior to


    Original     		PDF XAPP138 XCV1000 XAPP137 FPGA Virtex 6 pin configuration XAPP138 CF75h XAPP132 XAPP139 XC4000 XC4000X XC4000XLA XCV50

    XC2S200

    Abstract: XCV1000E
    Text: Reference QPRO QPRO QML-Certified FPGAs and PROMs The Xilinx QPRO family of Radiation Hardened FPGAs and PROMs are finding homes in many new satellite and space applications. Both the XQR4000XL and XQVR Virtex products are being designed into space systems that will utilize reconfigurable technology. Numerous communications and GPS satellites, space probe, and


    Original     		PDF XQR4000XL XCV1000E XCV3200E XCV405EM XCV812EM XC2S200) XC9500 XC4000E/L/EX XC4000XL/XLA XC4020) XC2S200

    PC44

    Abstract: SO20 VQ44 XC17V00 XC18V00 XC2VP20 XC2VP30 XC2VP40
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v5.0 April 5, 2004 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		PDF XC18V00 DS026 XC18V04 XC18V02, XC18V01 XC18V512, PC44 SO20 VQ44 XC17V00 XC2VP20 XC2VP30 XC2VP40

    XAPP158

    Abstract: XCV2000E XCV2600E XCV3200E XCV405E XCV50E XCV600E XCV812E
    Text: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025-3 v2.3.2 March 14, 2003 Production Product Specification Virtex-E Extended Memory Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a


    Original     		PDF DS025-3 DS025-1, DS025-2, DS025-3, DS025-4, XAPP158 XCV2000E XCV2600E XCV3200E XCV405E XCV50E XCV600E XCV812E

    FPGA Virtex 6

    Abstract: aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200
    Text: Application Note: Virtex-E Families R Virtex Package Compatibility Guide XAPP235 v1.3 June 20, 2000 Summary This package compatibility guide describes the pinouts and established guidelines for package compatibility between the Virtex family and the Virtex-E and Virtex-E Extended Memory


    Original     		PDF XAPP235 FG900 XCV1000E XCV812E XCV1000E L264N L264P L279N L279P FPGA Virtex 6 aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200

    SO-G8

    Abstract: 17128E xc1736e xilinx 8 pin dip HW-130 SO20 XC1700 XC1700E XC1701 Xilinx 17128
    Text: Product Obsolete or Under Obsolescence < B L R DS027 v3.5 June 25, 2008 XC1700E, XC1700EL, and XC1700L Series Configuration PROMs Product Specification 8 Features • One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx


    Original     		PDF DS027 XC1700E, XC1700EL, XC1700L XC1700E XC1700L 20-pin 44pin 44-pin SO-G8 17128E xc1736e xilinx 8 pin dip HW-130 SO20 XC1700 XC1701 Xilinx 17128

    XCF04S

    Abstract: xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb
    Text: 47 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.13.1 April 3, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


    Original     		PDF DS123 XCF04S xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb

    xcf16pfs

    Abstract: Xilinx XCF04S XCF01S XC2V80 DS026
    Text: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.3 May 7, 2004 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS FLASH Process • Endurance of 20,000 Program/Erase Cycles


    Original     		PDF DS123 xcf16pfs Xilinx XCF04S XCF01S XC2V80 DS026

    XC3S250E design guide

    Abstract: csb 485 E2
    Text: <BL Blue> R DS123 v2.11 February 1, 2007 Platform Flash In-System Programmable Configuration PROMs Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process


    Original     		PDF DS123 LVCMOS25 XC3S250E design guide csb 485 E2

    Untitled

    Abstract: No abstract text available
    Text: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025 v1.3 November 20, 2000 Preliminary Product Specification Features • • • • Fast, Extended Block RAM, 1.8 V FPGA Family - 560 Kb and 1,120 Kb embedded block RAM - 130 MHz internal performance (four LUT levels)


    Original     		PDF DS025 32/64-bit, 33/66-MHz FG676 XCV405E,

    xc18v02 Date Marking

    Abstract: XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C XC18V00
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v3.10 April 17, 2003 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		PDF XC18V00 DS026 XC2S400E XC2S600E xc18v02 Date Marking XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C

    xilinx MARKING CODE XC4000

    Abstract: XC18V01SO20C 18V512 XC18V00
    Text: XC18V00 Series of In-System Programmable Configuration PROMs R DS026 v2.7 April 4, 2001 5 Product Specification Features Description • Xilinx introduces the XC18V00 series of in-system programmable configuration PROMs. Initial devices in this 3.3V family are a 4-megabit, a 2-megabit, a 1-megabit, a 512-Kbit,


    Original     		PDF XC18V00 DS026 512-Kbit, 256-Kbit XC18V01, XC18V512, XC18V256 xilinx MARKING CODE XC4000 XC18V01SO20C 18V512

    Virtex-6 reflow

    Abstract: WS609 xc3s3400a xcv400e-b UG116 XCS20XL pqg208 UG-116 XC1702L XCE4VSX25 xc3s500e fg320
    Text: Device Reliability Report First Quarter 2010 UG116 v5.9 May 4, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, p∅ost, or transmit the


    Original     		PDF UG116 611GU FGG676 FFG1152 Virtex-6 reflow WS609 xc3s3400a xcv400e-b UG116 XCS20XL pqg208 UG-116 XC1702L XCE4VSX25 xc3s500e fg320

    XCF02S

    Abstract: pcb footprint FS48, and FSG48 XCF32P DS123 FS48 VO20 VO48 XCF01S XCF32PVO48C XCF08PFS48C
    Text: R DS123 v2.6 March 14, 2005 4 2 Platform Flash In-System Programmable Configuration PROMS Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS NOR FLASH Process • Endurance of 20,000 Program/Erase Cycles


    Original     		PDF DS123 XCF08P/XCF16P/XCF32P VOG48, FSG48 XCF01S/XCF02S/XCF04S XCF02S pcb footprint FS48, and FSG48 XCF32P DS123 FS48 VO20 VO48 XCF01S XCF32PVO48C XCF08PFS48C

    XC18V01SO20C

    Abstract: 18V256 XC18V00 XC18V04 XC2S100 XC18V04VQ44I XC18V01PC20I
    Text: XC18V00 Series of In-System Programmable Configuration PROMs R DS026 v3.5 June 14, 2002 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		PDF XC18V00 DS026 XC18V01SO20C 18V256 XC18V04 XC2S100 XC18V04VQ44I XC18V01PC20I

    transistor tt 2222

    Abstract: TT 2222 Horizontal Output Transistor pins out tt 2222 Datasheet TT 2222 Horizontal Output voltage FG676 XCV405E XCV405E-6BG560C XCV812E AB244 N203
    Text: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025-1 v1.4 April 2, 2001 Preliminary Product Specification Features • • • • Fast, Extended Block RAM, 1.8 V FPGA Family - 560 Kb and 1,120 Kb embedded block RAM - 130 MHz internal performance (four LUT levels)


    Original     		PDF DS025-1 32/64-bit, 33/66-MHz XCV405E XCV812E DS025-1, DS025-2, DS025-3, DS025-4, DS025-4 transistor tt 2222 TT 2222 Horizontal Output Transistor pins out tt 2222 Datasheet TT 2222 Horizontal Output voltage FG676 XCV405E-6BG560C AB244 N203

    vhdl code for 8 bit ram

    Abstract: 16 word 8 bit ram using vhdl 16 bit register VERILOG vhdl code for memory in cam XCV1000 XAPP204 8 bit data bus using vhdl xapp204.zip 16 bit register vhdl 8 bit ram using vhdl
    Text: Application Note: Virtex Series Using Block RAM for High Performance Read/Write CAMs R Author: Jean-Louis Brelet XAPP204 v1.2 May 2, 2000 Summary CAM (Content Addressable Memory) offers increased data search speed. In various applications based on CAM, there are differing requirements for data organinzatation and read/


    Original     		PDF XAPP204 XAPP201, vhdl code for 8 bit ram 16 word 8 bit ram using vhdl 16 bit register VERILOG vhdl code for memory in cam XCV1000 XAPP204 8 bit data bus using vhdl xapp204.zip 16 bit register vhdl 8 bit ram using vhdl

    XAPP151

    Abstract: BCC-1 Equivalent IR 740 XCV100 XCV100E XCV150 XCV200 XCV200E XCV300 XCV50
    Text: Application Note: Virtex Series R XAPP151 v1.5 September 27, 2000 Summary Virtex Series Configuration Architecture User Guide The Virtex architecture supports powerful new configuration modes, including partial reconfiguration. These mechanisms are designed to give advanced applications access to and


    Original     		PDF XAPP151 XAPP151 BCC-1 Equivalent IR 740 XCV100 XCV100E XCV150 XCV200 XCV200E XCV300 XCV50

    34992

    Abstract: 40X32 XC2V80 XC2V40 XC2V250 XC2V500 XC2V10000
    Text: Virtex Reference Virtex-II and Virtex Series FPGAs X 17280 207K 1.5M 1104K 48x40 1920 7680 528 2/24 Y X 24192 290K 2M 1344K 56x48 2688 10752 624 2/24 Y X 32256 387K 3M 2176K 64x56 3584 14336 720 2/24 Y X 51840 622K 4M 2880K 80x72 5760 23040 912 2/24 Y X 76032


    Original     		PDF 857K-2 1240K 80x120 221K-3 1530K 92x138 608K-4 1846K 104x156 068K-1 34992 40X32 XC2V80 XC2V40 XC2V250 XC2V500 XC2V10000

    256x16* STATIC RAM

    Abstract: 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50
    Text: Single-Port Block Memory Core v6.2 DS234 April 28, 2005 Features • Fully synchronous drop-in module for Virtex , Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Supports all three Virtex-II write mode options:


    Original     		PDF DS234 256x16* STATIC RAM 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50

    XCV812E

    Abstract: PCI33 XCV405E FG676 ah55 C2G6 AF124
    Text: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025 v1.2 September 19, 2000 Preliminary Product Specification Features • • • • Fast, Extended Block RAM, 1.8 V FPGA Family - 560 kb and 1,120 kb embedded block RAM - 130 MHz internal performance (four LUT levels)


    Original     		PDF DS025 32/64-bit, 33/66-MHz BG560 FG676 XCV405E, XCV812E PCI33 XCV405E ah55 C2G6 AF124

    diode t25 4 H9

    Abstract: DIODE AJ22 AK19 diode diode t25 4 G9 AF124 ag33 diode t25 4 H9 AF2.5 din 74 FG676 AL91
    Text: Virtex -E 1.8 V Extended Memory Field Programmable Gate Arrays R DS025-4 v1.6 July 17, 2002 Production Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers. These pins become


    Original     		PDF DS025-4 DS025-1, DS025-2, DS025-3, DS025-4, diode t25 4 H9 DIODE AJ22 AK19 diode diode t25 4 G9 AF124 ag33 diode t25 4 H9 AF2.5 din 74 FG676 AL91